ACEX 1K Programmable Logic Device Family Data Sheet
Table 50. EP1K50 External Bidirectional Timing Parameters
Note (1)
Symbol
Speed Grade
-2
Unit
-1
-3
Min
Max
Min
Max
Min
Max
tINSUBIDIR (2)
tINHBIDIR (2)
2.7
0.0
3.7
0.0
2.0
3.2
0.0
4.2
0.0
2.0
4.3
0.0
–
ns
ns
ns
ns
ns
ns
ns
t
INSUBIDIR (3)
tINHBIDIR (3)
OUTCOBIDIR (2)
tXZBIDIR (2)
–
t
4.5
6.8
6.8
3.5
6.8
6.8
5.2
7.8
7.8
4.2
8.4
8.4
2.0
7.3
10.1
10.1
–
t
t
ZXBIDIR (2)
OUTCOBIDIR (3)
0.5
0.5
–
tXZBIDIR (3)
ZXBIDIR (3)
–
ns
ns
t
–
Notes to tables:
(1) All timing parameters are described in Tables 22 through 29.
(2) This parameter is measured without use of the ClockLock or ClockBoost circuits.
(3) This parameter is measured with use of the ClockLock or ClockBoost circuits
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Altera Corporation
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