Timing Model
Table 4–27. M4K Block Internal Timing Microparameters
-6 -7
-8
Symbol
Unit
Max
Min
Max
4,379
2,910
Min
Max
5,035
3,346
Min
tM4KRC
5,691
3,783
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
tM4KWC
tM4KWERESU
tM4KWEREH
tM4KBESU
72
43
72
43
72
43
72
43
72
43
72
43
82
49
82
49
82
49
82
49
82
49
82
49
93
55
93
55
93
55
93
55
93
55
93
55
tM4KBEH
tM4KDATAASU
tM4KDATAAH
tM4KADDRASU
tM4KADDRAH
tM4KDATABSU
tM4KDATABH
tM4KADDRBSU
tM4KADDRBH
tM4KDATACO1
tM4KDATACO2
tM4KCLKHL
tM4KCLR
621
714
807
4,351
5,003
5,656
1,234
286
1,562
328
1,818
371
Table 4–28. Routing Delay Internal Timing Microparameters
-6 -7
-8
Symbol
Unit
Min
Max
261
338
244
Min
Max
300
388
281
Min
Max
339
439
318
tR4
tC4
tLOCAL
ps
ps
ps
External Timing Parameters
External timing parameters are specified by device density and speed
grade. Figure 4–2 shows the timing model for bidirectional IOE pin
timing. All registers are within the IOE.
Altera Corporation
January 2007
4–15
Preliminary
ALTERA [ ALTERA CORPORATION ]
