Adaptive Logic Modules
To pack two five-input functions into one ALM, the functions must have
at least two common inputs. The common inputs are dataaand datab.
The combination of a four-input function with a five-input function
requires one common input (either dataaor datab).
To implement two six-input functions in one ALM, four inputs must be
shared and the combinational function must be the same. For example, a
4 × 2 crossbar switch (two 4-to-1 multiplexers with common inputs and
unique select lines) can be implemented in one ALM, as shown in
Figure 2–31. The shared inputs are dataa, datab, datac, and datad,
while the unique select lines are datae0and dataf0for function0,
and datae1and dataf1for function1. This crossbar switch
consumes four LUTs in a four-input LUT-based architecture.
Figure 2–31. 4 × 2 Crossbar Switch Example
4 × 2 Crossbar Switch
Implementation in 1 ALM
sel0[1..0]
inputa
inputb
dataf0
datae0
dataa
datab
datac
datad
Six-Input
LUT
(Function0)
out0
combout0
combout1
inputc
inputd
out1
sel1[1..0]
Six-Input
LUT
(Function1)
datae1
dataf1
In a sparsely used device, functions that could be placed into one ALM
can be implemented in separate ALMs. The Quartus II Compiler spreads
a design out to achieve the best possible performance. As a device begins
to fill up, the Quartus II software automatically utilizes the full potential
of the Arria GX ALM. The Quartus II Compiler automatically searches for
functions of common inputs or completely independent functions to be
placed into one ALM and to make efficient use of the device resources. In
addition, you can manually control resource usage by setting location
assignments. Any six-input function can be implemented utilizing inputs
dataa, datab, datac, datad, and either datae0and dataf0or
datae1and dataf1. If datae0and dataf0are utilized, the output is
driven to register0, and/or register0is bypassed and the data
drives out to the interconnect using the top set of output drivers (see
Figure 2–32). If datae1and dataf1are utilized, the output drives to
register1and/or bypasses register1and drives to the interconnect
2–44
Arria GX Device Handbook, Volume 1
Altera Corporation
May 2008