January 2006
Preliminary
Table 1: Output Voltage Select Table
VS2*
0
0
0
0
1
1
1
1
VS1*
0
0
1
1
0
0
1
1
VS0*
0
1
0
1
0
1
0
1
Output Voltage
3.3V
2.5V
1.8V
1.5V
1.25V
1.2V
0.8V
Reserved
Synchronous Buck Converter
The EN5365 is a synchronous, pin programmable
power supply with integrated power MOSFET
switches and integrated inductor. The nominal input
voltage range is 2.4-5.0V. The output can be set to
common pre-set voltages by connecting appropriate
combinations of 3 voltage selection pins to ground.
The feedback control loop is a type III voltage-mode
and the part uses a low-noise PWM topology. Up to
6A of output current can be drawn from this
converter. The 5MHz operating frequency enables the
use of small-size output capacitors.
The power supply has the following protection
features:
•
Programmable over-current protection (to
protect the IC from excessive load current)
•
Thermal shutdown with hysteresis.
•
Over-voltage protection
•
Under-voltage lockout circuit to disable the
converter output when the input voltage is less
than approximately 2.2V
Additional features include:
•
Soft-start circuit, limiting the in-rush current
when the converter is powered up.
Power good circuit indicating whether the output
voltage is within 90%-120% of the
programmed voltage.
Input Capacitor Selection
The EN5365 requires between 40-80uF of input
capacitance. Low-cost, low-ESR ceramic capacitors
should be used as input capacitors for this converter.
The dielectric must be X5R or X7R rated. In some
applications, lower value capacitors are needed in
parallel with the larger, capacitors in order to provide
high frequency decoupling.
Output Capacitor Selection
The EN5365 has been optimized for use with
approximately 50µF of output capacitance. Low ESR
ceramic capacitors are required with X5R or X7R
rated dielectric formulation. Y5V or equivalent
dielectric formulations must not be used as these loose
capacitance with frequency, temperature and bias
voltage.
Output ripple voltage is determined by the aggregate
output capacitor impedance. Output impedance,
denoted as Z, is comprised of effective series
resistance, ESR, and effective series inductance, ESL:
Z = ESR + ESL.
Placing output capacitors in parallel reduces the
impedance and will hence result in lower ripple
voltage.
Output Voltage Programming
The EN5365 output voltage is programmed using a 3-
pin voltage-ID or VID selector. Three binary VID
pins allow the user to choose one of seven pre-set
voltages. Refer to table 1 for the proper VID pin
settings to choose VOUT.
The voltage select pins, VS0, VS1, and VS2, are
pulled-up internally and so will default to a logic high,
or “1”, if left “open”. Connecting the voltage select
pin to ground will result in a logic “0”.
1
Z
Total
=
1
1
1
+
+
...
+
Z
1
Z
2
Z
n
Typical ripple versus capacitance is given below:
6
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