Chapter 4: Embedded Multipliers in the Cyclone III Device Family
4–7
Operational Modes
Figure 4–4 shows the embedded multiplier configured to support two 9-bit
multipliers.
Figure 4–4. 9-Bit Multiplier Mode
signa
signb
aclr
clock
ena
D
Q
Data A 0 [8..0]
Data B 0 [8..0]
ENA
Data Out 0 [17..0]
D
Q
CLRN
ENA
CLRN
D
Q
ENA
CLRN
9 × 9 Multiplier
D
Q
Data A 1 [8..0]
Data B 1 [8..0]
ENA
Data Out 1 [17..0]
D
Q
CLRN
ENA
CLRN
D
Q
ENA
CLRN
9 × 9 Multiplier
Embedded Multiplier
All 9-bit multiplier inputs and results are independently sent through registers. The
multiplier inputs can accept signed integers, unsigned integers, or a combination of
both. Two 9 × 9 multipliers in the same embedded multiplier block share the same
signaand signbsignal. Therefore, all the Data Ainputs feeding the same embedded
multiplier must have the same sign representation. Similarly, all the Data Binputs
feeding the same embedded multiplier must have the same sign representation.
December 2011 Altera Corporation
Cyclone III Device Handbook
Volume 1
ALTERA [ ALTERA CORPORATION ]
