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DPCLK0 参数 Datasheet PDF下载

DPCLK0图片预览
型号: DPCLK0
PDF下载: 下载PDF文件 查看货源
内容描述: 的Cyclone III器件手册 [Cyclone III Device Handbook]
分类和应用:
文件页数/大小: 274 页 / 7302 K
品牌: ALTERA [ ALTERA CORPORATION ]
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9–72  
Chapter 9: Configuration, Design Security, and Remote System Upgrades in the Cyclone III Device Family  
Design Security  
Table 9–24. Security Key Features (Part 2 of 2)  
Volatile Key Features  
Description  
Secure against copying, reverse engineering, and  
tampering  
Design protection  
Note to Table 9–24:  
(1) Key programming is carried out using the JTAG interface.  
AES volatile key zeroization is supported in Cyclone III LS devices. The volatile key  
clear and key program JTAG instructions from the device core is supported to protect  
Cyclone III LS devices against tampering. You can clear and reprogram the key from  
the device core whenever tampering attempt is detected by executing the  
KEY_CLR_VREG and KEY_PROG_VOLJTAG instructions to clear and reprogram the  
volatile key, and then reset the Cyclone III LS device by pulling the nCONFIGpin low  
for at least 500 ns. When nCONFIGreturns to a logic-high level and nSTATUSis released  
by the Cyclone III LS device, reconfiguration begins to configure the Cyclone III LS  
device with a benign or unencrypted configuration file. After configuration is  
successfully completed, observe the cyclecompletesignal from error detection block  
to ensure that reconfigured CRAM bits content is correct for at least one error  
detection cycle. You can also observe the cyclecompleteand crcerrorsignals for any  
unintentional CRAM bits change.  
f
cyclecompleteis a signal that is routed from the error detection block to the core for  
the purpose of every complete error detection cycle. You must include the  
cycloneiiils_crcblockWYSIWYG atom in your design to use the cyclecomplete  
signal. For more information about the SEU mitigation, refer to the SEU Mitigation in  
Cyclone III Devices chapter.  
V
CCBAT is a dedicated power supply for the volatile key storage and not shared with  
other on-chip power supplies, such as VCCIO or VCC. VCCBAT continuously supplies  
power to the volatile register regardless of the on-chip supply condition. The nominal  
voltage for this supply is 3.0 V, while its valid operating range is from 1.2 to 3.3 V. If  
you do not use the volatile security key, you may connect the VCCBAT to a 1.8-V, 2.5-V,  
or 3.0-V power supply.  
1
1
After power-up, wait for 200 ms (Standard POR) or 9 ms (Fast POR) before beginning  
the key programming to ensure that VCCBAT is at its full rail.  
As an example, BR1220 (-30°C to +80°C) and BR2477A (-40 C to +125°C) are lithium  
coin-cell type batteries used for volatile key storage purposes.  
f
For more information about the battery specifications, refer to the Cyclone III LS Device  
Data Sheet chapter.  
Cyclone III LS Design Security Solution  
Cyclone III LS devices are SRAM-based devices. To provide design security,  
Cyclone III LS devices require a 256-bit volatile key for configuration bitstream  
encryption.  
Cyclone III Device Handbook  
Volume 1  
August 2012 Altera Corporation  
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