Chapter 8: External Memory Interfaces in the Cyclone III Device Family
8–7
Cyclone III Device Family Memory Interfaces Pin Support
Table 8–2 lists the numbers of DQS or DQ groups supported on each side of the
Cyclone III LS device only.
Table 8–2. Cyclone III LS Device DQS and DQ Bus Mode Support for Each Side of the Device
Number Number Number Number Number Number
Device
Package
Side
of ×8
of ×9
of ×16
Groups
of ×18
Groups
of ×32
Groups
of ×36
Groups
Groups
Groups
—
—
—
—
1
Left
Right
Top
2
2
2
2
4
4
6
6
2
2
2
2
4
4
6
6
2
2
2
2
4
4
6
6
2
2
2
2
4
4
6
6
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
1
1
1
1
2
2
2
2
1
1
1
1
2
2
2
2
1
1
1
1
2
2
2
2
1
1
1
1
2
2
2
2
1
1
1
1
2
2
2
2
1
1
1
1
2
2
2
2
1
1
1
1
2
2
2
2
1
1
1
1
2
2
2
2
—
—
—
—
1
484-pin FineLine
BGA/
484-pin Ultra FineLine
(1)
BGA
Bottom
Left
EP3CLS70
Right
Top
1
1
780-pin FineLine BGA
1
1
Bottom
Left
1
1
—
—
—
—
1
—
—
—
—
1
484-pin FineLine
BGA/
Right
Top
484-pin Ultra FineLine
(1)
BGA
Bottom
Left
EP3CLS100
Right
Top
1
1
780-pin FineLine BGA
1
1
Bottom
Left
1
1
—
—
—
—
1
—
—
—
—
1
484-pin FineLine BGA
Right
Top
(1)
Bottom
Left
EP3CLS150
Right
Top
1
1
780-pin FineLine BGA
1
1
Bottom
Left
1
1
—
—
—
—
1
—
—
—
—
1
484-pin FineLine BGA
Right
Top
(1)
Bottom
Left
EP3CLS200
Right
Top
1
1
780-pin FineLine BGA
1
1
Bottom
1
1
Note to Table 8–2:
(1) This device package does not support x32 or 36 mode.
July 2012 Altera Corporation
Cyclone III Device Handbook
Volume 1
ALTERA [ ALTERA CORPORATION ]
