7–16
Chapter 7: High-Speed Differential Interfaces in the Cyclone III Device Family
High-Speed I/O Timing
High-Speed I/O Timing
This section discusses the timing budget, waveforms, and specifications for
source-synchronous signaling in the Cyclone III device family. Timing for
source-synchronous signaling is based on skew between the data and clock signals.
High-speed differential data transmission requires timing parameters provided by IC
vendors and requires you to consider the board skew, cable skew, and clock jitter. This
section provides information about high-speed I/O standards timing parameters in
the Cyclone III device family.
Table 7–5 lists the parameters of the timing diagram as shown in Figure 7–15.
Table 7–5. High-Speed I/O Timing Definitions
Parameter
Symbol
Description
The timing difference between the fastest and slowest output
edges, including tCO variation and clock skew. The clock is
included in the TCCS measurement.
(1)
Transmitter channel-to-channel skew
TCCS
The period of time during which the data must be valid in order
for you to capture it correctly. The setup and hold times
determine the ideal strobe position in the sampling window.
TSW = TSU + Thd + PLL jitter.
Sampling window
SW
RSKM is defined by the total margin left after accounting for the
sampling window and TCCS. The RSKM equation is:
Receiver input skew margin
RSKM
TUI – SW – TCCS
RSKM = --------------------------------------------------
2
Allowed input jitter on the input clock to the PLL that is tolerable
while maintaining PLL lock.
Input jitter tolerance (peak-to-peak)
—
—
Output jitter (peak-to-peak)
Peak-to-peak output jitter from the PLL.
Note to Table 7–5:
(1) The TCCS specification applies to the entire bank of differential I/O as long as the SERDES logic is placed in the logic array block (LAB) adjacent
to the output pins.
Figure 7–15. High-Speed I/O Timing Diagram
External
Input Clock
Time Unit Interval (TUI)
Internal Clock
TCCS
RSKM
RSKM
TCCS
Receiver
Input Data
Sampling Window (SW)
Cyclone III Device Handbook
Volume 1
December 2011 Altera Corporation
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