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DPCLK0 参数 Datasheet PDF下载

DPCLK0图片预览
型号: DPCLK0
PDF下载: 下载PDF文件 查看货源
内容描述: 的Cyclone III器件手册 [Cyclone III Device Handbook]
分类和应用:
文件页数/大小: 274 页 / 7302 K
品牌: ALTERA [ ALTERA CORPORATION ]
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7–8  
Chapter 7: High-Speed Differential Interfaces in the Cyclone III Device Family  
High-Speed I/O Standards Support  
Designing with LVDS  
Cyclone III device family I/O banks support LVDS I/O standard. The left and right  
I/O banks support true LVDS transmitters. On the top and bottom I/O banks, the  
emulated LVDS transmitters are supported using two single-ended output buffers  
with external resistors. One of the single-ended output buffers is programmed to have  
opposite polarity. The LVDS receiver requires an external 100-termination resistor  
between the two signals at the input buffer.  
Figure 7–2 shows a point-to-point LVDS interface using Cyclone III device family true  
LVDS output and input buffers.  
Figure 7–2. Cyclone III Device Family LVDS Interface with True Output Buffer on the Left and Right I/O Banks  
Cyclone III Device Family  
Transmitting Device  
Receiving Device  
txout +  
txout -  
rxin +  
rxin -  
txout +  
txout -  
rxin +  
50 Ω  
50 Ω  
Cyclone III  
Device  
Family Logic  
Array  
50 Ω  
50 Ω  
100 Ω  
100 Ω  
rxin -  
Input Buffer  
Output Buffer  
Figure 7–3 shows a point-to-point LVDS interface with Cyclone III device family  
LVDS using two single-ended output buffers and external resistors.  
(1)  
Figure 7–3. LVDS Interface with External Resistor Network on the Top and Bottom I/O Banks  
Cyclone III Device Family  
Emulated  
LVDS Transmitter  
Resistor Network  
LVDS Receiver  
R
S
50 Ω  
50 Ω  
100 Ω  
R
P
R
S
Note to Figure 7–3:  
(1) RS= 120 ; RP= 170   
BLVDS I/O Standard Support in the Cyclone III Device Family  
The BLVDS I/O standard is a high-speed differential data transmission technology  
that extends the benefits of standard point-to-point LVDS to multipoint configuration  
that supports bidirectional half-duplex communication. BLVDS differs from standard  
LVDS by providing a higher drive to achieve similar signal swings at the receiver  
while loaded with two terminations at both ends of the bus.  
Cyclone III Device Handbook  
Volume 1  
December 2011 Altera Corporation  
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