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DIFFCLK_5P 参数 Datasheet PDF下载

DIFFCLK_5P图片预览
型号: DIFFCLK_5P
PDF下载: 下载PDF文件 查看货源
内容描述: 的Cyclone III器件手册 [Cyclone III Device Handbook]
分类和应用:
文件页数/大小: 274 页 / 7302 K
品牌: ALTERA [ ALTERA CORPORATION ]
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4–6  
Chapter 4: Embedded Multipliers in the Cyclone III Device Family  
Operational Modes  
1
You can also use embedded multipliers of the Cyclone III device family to implement  
multiplier adder and multiplier accumulator functions, in which the multiplier  
portion of the function is implemented using embedded multipliers, and the adder or  
accumulator function is implemented in logic elements (LEs).  
18-Bit Multipliers  
You can configure each embedded multiplier to support a single 18 × 18 multiplier for  
input widths of 10 to 18 bits.  
Figure 4–3 shows the embedded multiplier configured to support an 18-bit multiplier.  
Figure 4–3. 18-Bit Multiplier Mode  
signa  
signb  
aclr  
clock  
ena  
D
Q
Data A [17..0]  
Data B [17..0]  
ENA  
Data Out [35..0]  
D
Q
CLRN  
ENA  
CLRN  
D
Q
ENA  
CLRN  
18 × 18 Multiplier  
Embedded Multiplier  
All 18-bit multiplier inputs and results are independently sent through registers. The  
multiplier inputs can accept signed integers, unsigned integers, or a combination of  
both. Also, you can dynamically change the signaand signbsignals and send these  
signals through dedicated input registers.  
9-Bit Multipliers  
You can configure each embedded multiplier to support two 9 × 9 independent  
multipliers for input widths of up to 9 bits.  
Cyclone III Device Handbook  
Volume 1  
December 2011 Altera Corporation