欢迎访问ic37.com |
会员登录 免费注册
发布采购

CYCLONE 参数 Datasheet PDF下载

CYCLONE图片预览
型号: CYCLONE
PDF下载: 下载PDF文件 查看货源
内容描述: [关于Altera公司的cyclone系列芯片的资料,是合集,在官网上下载的,适合ep2c系列的FPGA]
分类和应用:
文件页数/大小: 470 页 / 5753 K
品牌: ALTERA [ ALTERA CORPORATION ]
 浏览型号CYCLONE的Datasheet PDF文件第323页浏览型号CYCLONE的Datasheet PDF文件第324页浏览型号CYCLONE的Datasheet PDF文件第325页浏览型号CYCLONE的Datasheet PDF文件第326页浏览型号CYCLONE的Datasheet PDF文件第328页浏览型号CYCLONE的Datasheet PDF文件第329页浏览型号CYCLONE的Datasheet PDF文件第330页浏览型号CYCLONE的Datasheet PDF文件第331页  
High-Speed Differential Interfaces in Cyclone II Devices  
Table 11–1. LVDS I/O Specifications (Part 2 of 2)  
Note (1)  
Symbol  
Parameter  
Condition  
Min  
Typ  
Max  
Units  
VID  
Input differential voltage  
(single-ended)  
0.1  
0.65  
V
VICM  
ΔVOS  
RL  
Input common mode  
voltage  
0.1  
90  
2.0  
50  
V
mV  
Ω
Change in VOS between RL = 100 Ω  
H and L  
Receiver differential input  
resistor  
100  
110  
Note to Table 11–1:  
(1) The specifications apply at the resistor network output.  
LVDS Receiver & Transmitter  
Figure 11–3 shows a simple point-to-point LVDS application where the  
source of the data is an LVDS transmitter. These LVDS signals are  
typically transmitted over a pair of printed circuit board (PCB) traces, but  
a combination of a PCB trace, connectors, and cables is a common  
application setup.  
Figure 11–3. Typical LVDS Application  
Cyclone II Device  
Transmitting Device  
Receiving Device  
txout +  
rxin +  
txout +  
txout -  
rxin +  
Cyclone II  
Logic  
Array  
120 Ω  
120 Ω  
100 Ω  
170 Ω  
rxin -  
100 Ω  
rxin -  
txout -  
Input Buffer  
Output Buffer  
Figures 11–4 and 11–5 show the signaling levels for LVDS receiver inputs  
and transmitter outputs, respectively.  
Altera Corporation  
February 2007  
11–5  
Cyclone II Device Handbook, Volume 1  
 复制成功!