Stratix II Architecture
Figure 2–11. ALM in Arithmetic Mode
carry_in
datae0
adder0
4-Input
LUT
To general or
local routing
To general or
local routing
D
Q
dataf0
datac
datab
dataa
reg0
4-Input
LUT
adder1
4-Input
LUT
To general or
local routing
datad
datae1
To general or
local routing
D
Q
4-Input
LUT
reg1
dataf1
carry_out
While operating in arithmetic mode, the ALM can support simultaneous
use of the adder's carry output along with combinational logic outputs. In
this operation, the adder output is ignored. This usage of the adder with
the combinational logic output provides resource savings of up to 50% for
functions that can use this ability. An example of such functionality is a
conditional operation, such as the one shown in Figure 2–12. The
equation for this example is:
R = (X < Y) ? Y : X
To implement this function, the adder is used to subtract ‘Y’ from ‘X.’ If
‘X’ is less than ‘Y,’ the carry_outsignal is ‘1.’ The carry_outsignal is
fed to an adder where it drives out to the LAB local interconnect. It then
feeds to the LAB-wide syncloadsignal. When asserted, syncload
selects the syncdatainput. In this case, the data ‘Y’ drives the
syncdata inputs to the registers. If ‘X’ is greater than or equal to ‘Y,’ the
syncloadsignal is de-asserted and ‘X’ drives the data port of the
registers.
Altera Corporation
May 2007
2–15
Stratix II Device Handbook, Volume 1
ALTERA [ ALTERA CORPORATION ]
