High-Speed Differential I/O with DPA Support
Table 2–23. EP2S60 Differential Channels
Note (1)
Center Fast PLLs
Corner Fast PLLs (4)
Transmitter/
Receiver Channels
Total
Package
PLL 1 PLL 2 PLL 3 PLL 4 PLL 7 PLL 8 PLL 9 PLL 10
484-pin
FineLine BGA
Transmitter
Receiver
38 (2)
(3)
10
19
11
21
16
29
17
31
21
42
21
42
9
9
10
19
11
21
16
29
17
31
21
42
21
42
10
-
9
-
9
-
10
-
19
10
21
13
29
14
31
21
42
21
42
19
10
21
13
29
14
31
21
42
21
42
42 (2)
(3)
11
-
10
-
10
-
11
-
672-pin
FineLine BGA
Transmitter
Receiver
58 (2)
(3)
16
-
13
-
13
-
16
-
62 (2)
(3)
17
-
14
-
14
-
17
-
1,020-pin
FineLine BGA
Transmitter
Receiver
84 (2)
(3)
21
-
21
-
21
-
21
-
84 (2)
(3)
21
-
21
-
21
-
21
-
Table 2–24. EP2S90 Differential Channels
Note (1)
Center Fast PLLs
Corner Fast PLLs (4)
Transmitter/
Receiver Channels
Total
Package
PLL 1 PLL 2 PLL 3 PLL 4 PLL 7 PLL 8 PLL 9 PLL 10
484-pinHybrid Transmitter
FineLine BGA
38 (2)
(3)
10
19
11
21
16
32
17
34
23
45
23
46
30
59
30
59
9
9
10
19
11
21
16
32
17
34
23
45
23
46
30
59
30
59
-
-
-
-
-
-
-
-
-
-
19
10
21
16
32
17
34
22
45
24
46
29
59
29
59
19
10
21
16
32
17
34
22
45
24
46
29
59
29
59
Receiver
42 (2)
(3)
-
-
-
-
-
-
780-pin
FineLine BGA
Transmitter
Receiver
64 (2)
(3)
-
-
-
-
-
-
-
-
68 (2)
(3)
-
-
-
-
-
-
1,020-pin
FineLine BGA
Transmitter
Receiver
90 (2)
(3)
23
-
22
-
22
-
23
-
94 (2)
(3)
23
-
24
-
24
-
23
-
1,508-pin
FineLine BGA
Transmitter
Receiver
118 (2)
(3)
30
-
29
-
29
-
30
-
118 (2)
(3)
30
-
29
-
29
-
30
-
2–98
Altera Corporation
May 2007
Stratix II Device Handbook, Volume 1