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CLK13 参数 Datasheet PDF下载

CLK13图片预览
型号: CLK13
PDF下载: 下载PDF文件 查看货源
内容描述: 的Stratix II器件手册,卷1 [Stratix II Device Handbook, Volume 1]
分类和应用:
文件页数/大小: 768 页 / 5210 K
品牌: ALTERA [ ALTERA CORPORATION ]
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Adaptive Logic Modules  
For the packing of two five-input functions into one ALM, the functions  
must have at least two common inputs. The common inputs are dataa  
and datab. The combination of a four-input function with a five-input  
function requires one common input (either dataaor datab).  
In the case of implementing two six-input functions in one ALM, four  
inputs must be shared and the combinational function must be the same.  
For example, a 4 × 2 crossbar switch (two 4-to-1 multiplexers with  
common inputs and unique select lines) can be implemented in one ALM,  
as shown in Figure 2–8. The shared inputs are dataa, datab, datac, and  
datad, while the unique select lines are datae0 and dataf0for  
function0, and datae1and dataf1for function1. This crossbar  
switch consumes four LUTs in a four-input LUT-based architecture.  
Figure 2–8. 4 × 2 Crossbar Switch Example  
4 × 2 Crossbar Switch  
Implementation in 1 ALM  
sel0[1..0]  
inputa  
inputb  
dataf0  
datae0  
dataa  
datab  
datac  
datad  
Six-Input  
LUT  
(Function0)  
out0  
combout0  
combout1  
inputc  
inputd  
out1  
sel1[1..0]  
Six-Input  
LUT  
(Function1)  
datae1  
dataf1  
In a sparsely used device, functions that could be placed into one ALM  
may be implemented in separate ALMs. The Quartus II Compiler spreads  
a design out to achieve the best possible performance. As a device begins  
to fill up, the Quartus II software automatically utilizes the full potential  
of the Stratix II ALM. The Quartus II Compiler automatically searches for  
functions of common inputs or completely independent functions to be  
placed into one ALM and to make efficient use of the device resources. In  
addition, you can manually control resource usage by setting location  
assignments.  
Any six-input function can be implemented utilizing inputs dataa,  
datab, datac, datad, and either datae0and dataf0or datae1and  
dataf1. If datae0and dataf0are utilized, the output is driven to  
register0, and/or register0is bypassed and the data drives out to  
the interconnect using the top set of output drivers (see Figure 2–9). If  
2–12  
Stratix II Device Handbook, Volume 1  
Altera Corporation  
May 2007  
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