Introduction
Stratix II devices are available in space-saving FineLine BGA® packages
(see Tables 1–2 and 1–3).
Table 1–2. Stratix II Package Options & I/O Pin Counts
Notes (1), (2)
484-Pin
Hybrid
FineLine
BGA
672-Pin
FineLine
BGA
780-Pin
FineLine
BGA
484-Pin
FineLine BGA
1,020-Pin
FineLine BGA FineLine BGA
1,508-Pin
Device
EP2S15
342
342
334
366
500
492
EP2S30
EP2S60 (3)
EP2S90 (3)
EP2S130 (3)
EP2S180 (3)
718
308
534
534
758
742
742
902
1,126
1,170
Notes to Table 1–2:
(1) All I/O pin counts include eight dedicated clock input pins (clk1p, clk1n, clk3p, clk3n, clk9p, clk9n,
clk11p, and clk11n) that can be used for data inputs.
(2) The Quartus II software I/O pin counts include one additional pin, PLL_ENA, which is not available as general-
purpose I/O pins. The PLL_ENApin can only be used to enable the PLLs within the device.
(3) The I/O pin counts for the EP2S60, EP2S90, EP2S130, and EP2S180 devices in the 1020-pin and 1508-pin packages
include eight dedicated fast PLL clock inputs (FPLL7CLKp/n, FPLL8CLKp/n, FPLL9CLKp/n, and
FPLL10CLKp/n) that can be used for data inputs.
Table 1–3. Stratix II FineLine BGA Package Sizes
484-Pin
Hybrid
Dimension
484 Pin
672 Pin
780 Pin
1,020 Pin
1,508 Pin
Pitch (mm)
Area (mm2)
1.00
529
1.00
729
1.00
729
1.00
841
1.00
1,089
1.00
1,600
Length × width
(mm × mm)
23 × 23
27 × 27
27 × 27
29 × 29
33 × 33
40 × 40
All Stratix II devices support vertical migration within the same package
(for example, you can migrate between the EP2S15, EP2S30, and EP2S60
devices in the 672-pin FineLine BGA package). Vertical migration means
that you can migrate to devices whose dedicated pins, configuration pins,
and power pins are the same for a given package across device densities.
To ensure that a board layout supports migratable densities within one
package offering, enable the applicable vertical migration path within the
Quartus II software (Assignments menu > Device > Migration Devices).
Altera Corporation
May 2007
1–3
Stratix II Device Handbook, Volume 1
ALTERA [ ALTERA CORPORATION ]
