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ACEX1K 参数 Datasheet PDF下载

ACEX1K图片预览
型号: ACEX1K
PDF下载: 下载PDF文件 查看货源
内容描述: 可编程逻辑器件系列 [Programmable Logic Device Family]
分类和应用: 可编程逻辑器件
文件页数/大小: 86 页 / 1181 K
品牌: ALTERA [ ALTERA CORPORATION ]
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ACEX 1K Programmable Logic Device Family Data Sheet  
Embedded Array Block  
The EAB is a flexible block of RAM, with registers on the input and output  
ports, that is used to implement common gate array megafunctions.  
Because it is large and flexible, the EAB is suitable for functions such as  
multipliers, vector scalars, and error correction circuits. These functions  
can be combined in applications such as digital filters and  
microcontrollers.  
Logic functions are implemented by programming the EAB with a read-  
only pattern during configuration, thereby creating a large LUT. With  
LUTs, combinatorial functions are implemented by looking up the results  
rather than by computing them. This implementation of combinatorial  
functions can be faster than using algorithms implemented in general  
logic, a performance advantage that is further enhanced by the fast access  
times of EABs. The large capacity of EABs enables designers to implement  
complex functions in a single logic level without the routing delays  
associated with linked LEs or field-programmable gate array (FPGA)  
RAM blocks. For example, a single EAB can implement any function with  
8 inputs and 16 outputs. Parameterized functions, such as LPM functions,  
can take advantage of the EAB automatically.  
The ACEX 1K enhanced EAB supports dual-port RAM. The dual-port  
structure is ideal for FIFO buffers with one or two clocks. The ACEX 1K  
EAB can also support up to 16-bit-wide RAM blocks. The ACEX 1K EAB  
can act in dual-port or single-port mode. When in dual-port mode,  
separate clocks may be used for EAB read and write sections, allowing the  
EAB to be written and read at different rates. It also has separate  
synchronous clock enable signals for the EAB read and write sections,  
which allow independent control of these sections.  
The EAB can also be used for bidirectional, dual-port memory  
applications where two ports read or write simultaneously. To implement  
this type of dual-port memory, two EABs are used to support two  
simultaneous reads or writes.  
Alternatively, one clock and clock enable can be used to control the input  
registers of the EAB, while a different clock and clock enable control the  
output registers (see Figure 2).  
Altera Corporation  
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