Features
Table 1–2. Device Family Support (Part 2 of 2)
Device Family
Support
HardCopy Stratix®
Stratix
Full
Full
Full
Stratix II
StratixII GX
Stratix III
Full
Preliminary
Full
StratixGX
Other device families
No support
■
■
■
■
■
■
■
Support for Arria™ GX device family
8b/10b encoding and decoding
Cascaded encoding and decoding
Industry compatible special character coding
Easy-to-use IP MegaWizard® interface
Support for OpenCore Plus evaluation
IP functional simulation models for use in Altera-supported VHDL
and Verilog HDL simulators
Features
Encoders and decoders are used for physical layer coding for Gigabit
Ethernet, Fibre Channel, and other applications. The 8b/10b encoder
takes byte inputs, and generates a direct current (DC) balanced stream
(equal number of 1s and 0s) with a maximum run length of 5. Some of the
individual 10-bit codes will have an equal number of 1s and 0s, while
others will have either four 1s and six 0s, or, six 1s and four 0s. In the latter
case, the disparity between 1s and 0s is used as an input to the next 10-bit
code generation, so that the disparity can be reversed, and maintain an
overall balanced stream. For this reason, some 8-bit inputs have two valid
10-bit codes, depending on the input disparity.
General
Description
The Altera8B10B Encoder/Decoder is a compact, high performance
MegaCore function capable of encoding and decoding in multi-gigabit
applications.
OpenCore Plus Evaluation
With Altera’s free OpenCore Plus evaluation feature, you can perform the
following actions:
■
Simulate the behavior of a megafunction within your system
1–2
MegaCore Version 7.2
Altera Corporation
October 2007
8B10B Encoder/Decoder MegaCore Function User Guide