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5M80ZT64C5N 参数 Datasheet PDF下载

5M80ZT64C5N图片预览
型号: 5M80ZT64C5N
PDF下载: 下载PDF文件 查看货源
内容描述: MAX V器件手册 [MAX V Device Handbook]
分类和应用:
文件页数/大小: 166 页 / 4016 K
品牌: ALTERA [ ALTERA CORPORATION ]
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7–36  
Chapter 7: User Flash Memory in MAX V Devices  
Software Support for UFM Block  
Parallel Interface  
This interface allows for parallel communication between the UFM block and outside  
logic. After the READrequest, WRITErequest, or ERASErequest is asserted (active low  
assertion), the outside logic or device (such as a microcontroller) can continue its  
operation while the data in the UFM is retrieved, written, or erased. During this time,  
the nBUSYsignal is driven “low” to indicate that it is not available to respond to any  
further request. After the operation is complete, the nBUSYsignal is brought back to  
“high” to indicate that it is now available to service a new request. If it was the Read  
request, the DATA_VALIDis driven “high” to indicate that the data at the DOport is the  
valid data from the last read address.  
Asserting READ WRITE, and ERASEat the same time is not allowed. Multiple requests  
,
are ignored and nothing is read from, written to, or erased in the UFM block. There is  
no support for sequential read and page write in the parallel interface. For both the  
read only and the read/write modes of the parallel interface, OSC_ENAis always  
asserted, enabling the internal oscillator. Table 7–15 lists the parallel interface pins and  
functions.  
Table 7–15. Parallel Interface Signals  
Pin  
Description  
16-bit data Input  
Function  
Receive 16-bit data in parallel. You can select an optional width of 3 to  
16 bits using the ALTUFM megafunction.  
DI[15..0]  
Transmit 16-bit data in parallel. You can select an optional width of 3 to  
16 bits using the ALTUFM megafunction.  
DO[15..0]  
16-bit data Output  
Address Register  
Operation sequence refers to the data that is pointed to by the address  
register. You can determine the address bus width using the ALTUFM  
megafunction.  
ADDR[8..0]  
nREAD  
READInstruction Signal  
WRITEInstruction Signal  
Initiates a read sequence.  
Initiates a write sequence.  
nWRITE  
Initiates a SECTOR-ERASE sequence indicated by the MSB of the  
ADDR[]port.  
nERASE  
ERASEInstruction Signal  
BUSYSignal  
Driven low to notify that it is not available to respond to any further  
request.  
nBUSY  
Driven high to indicate that the data at the DOport is the valid data from  
the last read address for read request.  
DATA_VALID  
Data Valid  
Even though the ALTUFM megafunction allows you to select the address widths  
range from 3 bits to 9 bits, the UFM block always expects a full 9 bits for the width of  
the address register. Therefore, the ALTUFM megafunction will always pad the  
remaining LSBs of the address register with '0's if the register width selected is less  
than 9 bits. The address register will point to sector 0 if the address received at the  
address register starts with a '0'. The address register will point to sector 1 if the  
address received starts with a '1'.  
Even though you can select an optional data register width of 3 to 16 bits using the  
ALTUFM megafunction, the UFM block always expects full 16 bits width for the data  
register. Reading from the data register always proceeds from MSB to LSB. The  
ALTUFM megafunction always pads the remaining LSBs of the data register with 1s if  
the user selects a data width of less than 16-bits.  
MAX V Device Handbook  
January 2011 Altera Corporation  
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