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5M80ZT100C5 参数 Datasheet PDF下载

5M80ZT100C5图片预览
型号: 5M80ZT100C5
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash PLD, 14ns, PQFP100, 16 X 16 MM, 0.50 MM PITCH, TQFP-100]
分类和应用: 时钟可编程逻辑
文件页数/大小: 166 页 / 4004 K
品牌: ALTERA [ ALTERA CORPORATION ]
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7–10  
Chapter 7: User Flash Memory in MAX V Devices  
UFM Operating Modes  
Program  
To program or write to the UFM, you must first perform a sequence to load the  
reference address into the address register. DRSHFTmust then be asserted high to load  
the data serially into the data register starting with the MSB. Loading an address into  
the address register and loading data into the data register can be done concurrently.  
After the 16 bits of data have been successfully shifted into the data register, the  
PROGRAMsignal must be asserted high to start writing to the UFM. On the rising edge,  
the data currently in the data register is written to the location currently in the address  
register. The BUSYsignal is asserted until the program sequence is completed. The data  
and address register should not be modified until the BUSYsignal is de-asserted, or the  
flash content will be corrupted. The PROGRAMsignal is ignored if the BUSYsignal is  
asserted. When the PROGRAMsignal is applied at exactly the same time as the ERASE  
signal, the behavior is undefined and the flash content is corrupted. Figure 7–7 shows  
the UFM waveforms during program mode.  
Figure 7–7. UFM Program Waveforms  
9 Address Bits  
tACLK  
ARSHFT  
ARCLK  
tAH  
tASU  
tADH  
ARDin  
tADS  
16 Data Bits  
tDCLK  
DRSHFT  
DRCLK  
tDSH  
tDSS  
DRDin  
tDDH  
tDDS  
DRDout  
OSC_ENA  
PROGRAM  
ERASE  
tOSCH  
tOSCS  
tPB  
tBP  
BUSY  
tPPMX  
MAX V Device Handbook  
January 2011 Altera Corporation  
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