2–18
Chapter 2: MAX V Architecture
MultiTrack Interconnect
The UFM block communicates with the logic array similar to LAB-to-LAB interfaces.
The UFM block connects to row and column interconnects and has local interconnect
regions driven by row and column interconnects. This block also has DirectLink
interconnects for fast connections to and from a neighboring LAB. For more
information about the UFM interface to the logic array, refer too “User Flash Memory
Block” on page 2–21.
Table 2–2 lists the MAX V device routing scheme.
Table 2–2. Routing Scheme for MAX V Devices
Destination
Source
LUT
Register Local DirectLink
UFM
Column Row Fast I/O
R4 (1) C4 (1)
LE
Chain
Chain
(1)
—
—
(1)
—
—
Block
IOE
IOE
(1)
—
—
LUT Chain
—
—
—
—
—
—
—
v
v
v
—
—
—
—
Register Chain
—
—
—
Local
Interconnect
—
—
—
—
—
—
—
—
—
—
—
v
v
v
—
—
DirectLink
Interconnect
v
—
—
—
—
R4 Interconnect
C4 Interconnect
LE
—
—
v
—
—
—
—
—
v
—
—
—
v
v
v
v
—
—
—
—
v
v
—
v
v
v
v
v
—
v
v
v
v
v
v
v
—
—
—
—
—
—
—
—
—
—
—
—
—
—
v
—
—
—
—
—
v
—
—
—
—
—
v
—
—
—
UFM Block
Column IOE
Row IOE
Note to Table 2–2:
(1) These categories are interconnects.
MAX V Device Handbook
December 2010 Altera Corporation
ALTERA [ ALTERA CORPORATION ]
