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5M160ZT100I5 参数 Datasheet PDF下载

5M160ZT100I5图片预览
型号: 5M160ZT100I5
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash PLD, 14ns, PQFP100, 16 X 16 MM, 0.50 MM PITCH, TQFP-100]
分类和应用: 时钟可编程逻辑
文件页数/大小: 166 页 / 4004 K
品牌: ALTERA [ ALTERA CORPORATION ]
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6–2  
Chapter 6: JTAG and In-System Programmability in MAX V Devices  
IEEE Std. 1149.1 Boundary-Scan Support  
Table 6–1. JTAG Instructions for MAX V Devices (Part 2 of 2)  
JTAG Instruction  
Instruction Code  
Description  
Selects the IDCODEregister and places it between the TDIand TDO  
pins, allowing you to shift the IDCODEregister out of the TDOpin  
serially.  
IDCODE  
00 0000 0110  
Places the 1-bit bypass register between the TDIand TDOpins,  
which allows the BST data to pass synchronously through target  
devices to adjacent devices if the device is operating in normal mode  
and tri-stating all the I/O pins.  
HIGHZ (1)  
CLAMP (1)  
00 0000 1011  
00 0000 1010  
Places the 1-bit bypass register between the TDIand TDOpins,  
which allows the BST data to pass synchronously through target  
devices to adjacent devices during normal device operation and  
holding I/O pins to a state defined by the data in the boundary-scan  
register.  
Allows you to define the scan chain between the TDIand TDOpins in  
the MAX V logic array. Use this instruction for custom logic and  
JTAG interfaces.  
USER0  
USER1  
00 0000 1100  
00 0000 1110  
Allows you to define the scan chain between the TDIand TDOpins in  
the MAX V logic array. Use this instruction for custom logic and  
JTAG interfaces.  
For the instruction codes  
of the IEEE 1532  
instructions, refer to the IEEE 1532 in-system concurrent (ISC) instructions used if  
IEEE 1532  
instructions  
IEEE 1532 BSDL Files  
page of the Altera  
website.  
programming a MAX V device through the JTAG port.  
Note to Table 6–1:  
(1) HIGHZ, CLAMP, and EXTESTinstructions do not disable weak pull-up resistors or bus hold features.  
w
You must not issue unsupported JTAG instructions to the MAX V device because this  
may put the device into an unknown state, requiring a power cycle to recover device  
operation.  
MAX V Device Handbook  
May 2011 Altera Corporation  
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