Chapter 1: Overview for Cyclone V Device Family
1–5
Cyclone V Family Plan
Table 1–4 and Table 1–5 list the Cyclone V SE, SX, and ST maximum resource counts.
Table 1–4. Maximum Resource Counts for Cyclone V SE Devices—Preliminary
Cyclone V SE Devices
Resource
5CSEA2
9,434
25,000
1,400
138
36
5CSEA4
15,094
40,000
2,240
220
58
5CSEA5
32,075
85,000
3,972
480
87
5CSEA6
41,509
110,000
5,140
621
112
224
6
ALM
LE
Block Memory (Kb)
MLAB Memory (Kb)
Variable-precision DSP Block
18 x 19 Multiplier
FPGA Fractional PLL
HPS PLL
72
116
5
174
6
4
3
3
3
3
FPGA GPIO
124
188
31
124
188
31
288
188
72
288
188
72
HPS I/O
LVDS
FPGA Memory Controller
HPS Memory Controller
—
1
1
1
1
1
1
1
ARM Cortex-A9 MPCore Processor Single- or dual-core Single- or dual-core Single- or dual-core Single- or dual-core
Table 1–5. Maximum Resource Counts for Cyclone V SX and ST Devices—Preliminary (Part 1 of 2)
Cyclone V SX Device
Cyclone V ST Device
5CSTD5 5CSTD6
32,075 41,509
Resource
5CSXC4
15,094
40,000
2,240
220
58
5CSXC5
32,075
85,000
3,972
480
87
5CSXC6
41,509
110,000
5,140
621
112
224
6
ALM
LE
85,000
3,972
480
87
110,000
5,140
621
112
224
6
Block Memory (Kb)
MLAB Memory (Kb)
Variable-precision DSP Block
18 x 19 Multiplier
FPGA Fractional PLL (1)
HPS PLL
116
5
174
6
174
6
3
3
3
3
3
3-Gbps Transceiver
5-Gbps Transceiver
FPGA GPIO
6
9
9
—
—
—
—
—
9
9
124
188
31
288
188
72
288
188
72
288
188
72
288
188
72
HPS I/O
LVDS
February 2012 Altera Corporation
Cyclone V Device Handbook
Volume 1: Device Overview and Datasheet
ALTERA [ ALTERA CORPORATION ]
