1–12
Chapter 1: Overview for Cyclone V Device Family
External Memory
External Memory
Cyclone V devices support up to two hard memory controllers for DDR3, DDR2,
LPDDR2, and LPDDR SDRAM devices. Each controller supports 8- to 32-bit
components of up to 4 gigabits (Gb) in density with two chip selects and optional
ECC. Cyclone V devices also support soft memory controllers for DDR3, DDR2,
LPDDR2, and LPDDR SDRAM for maximum flexibility.
Table 1–10 lists the performance of the external memory interface in Cyclone V
devices.
Table 1–10. External Memory Interface Performance in Cyclone V Devices
Interface
Voltage (V)
1.5
Hard Controller (MHz) Soft Controller (MHz)
DDR3 SDRAM
DDR3L SDRAM
DDR3U SDRAM
400
400
333
400
400
333
200
300
300
300
300
300
300
200
1.35
1.25
1.8
DDR2 SDRAM
1.5
LPDDR2 SDRAM
LPDDR SDRAM
1.2
1.8
Adaptive Logic Module
Cyclone V devices use a 28-nm ALM as the basic building block of the logic fabric.
The ALM, as shown in Figure 1–3, uses an 8-input fracturable look-up table (LUT)
with four dedicated registers to help improve timing closure in register-rich designs
and achieve an even higher design packing capability than previous generations.
You can configure up to 25% of the ALMs in Cyclone V devices as distributed
memory using MLABs. For more information, refer to “Embedded Memory” on
page 1–14.
Figure 1–3. ALM for Cyclone V Devices
Cyclone V Device
Reg
1
2
Full
Adder
3
4
5
6
7
Reg
Adaptive
LUT
Reg
Reg
8
Full
Adder
Cyclone V Device Handbook
February 2012 Altera Corporation
Volume 1: Device Overview and Datasheet