Chapter 2: Device Datasheet for Cyclone V Devices
2–27
Configuration Specification
FPP Configuration Timing
This section describes the fast passive parallel (FPP) configuration timing parameters
for Cyclone V devices.
DCLK-to-DATA[] Ratio (r) for FPP Configuration
FPP configuration requires a different DCLK-to-DATA[]ratio when you turn on
encryption or the compression feature.
Table 2–33 lists the DCLK-to-DATA[]ratio for each combination.
Table 2–33. DCLK-to-DATA[] Ratio for Cyclone V Devices—Preliminary (1)
Configuration Scheme
Encryption
Compression
DCLK-to-DATA[] ratio (r)
Off
On
Off
On
Off
On
Off
On
Off
Off
On
On
Off
Off
On
On
1
1
2
2
1
2
4
4
FPP (8-bit wide)
FPP (16-bit wide)
Note to Table 2–33:
(1) Depending on the DCLK-to-DATA[]ratio, the host must send a DCLKfrequency that is r times the DATA[]
rate in byte per second (Bps) or word per second (Wps). For example, in FPP x16 where the r is 2, the DCLK
frequency must be 2 times the DATA[]rate in Wps.
February 2012 Altera Corporation
Cyclone V Device Handbook
Volume 1: Device Overview and Datasheet
ALTERA [ ALTERA CORPORATION ]
