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5ASXMB3E4F31I3N 参数 Datasheet PDF下载

5ASXMB3E4F31I3N图片预览
型号: 5ASXMB3E4F31I3N
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, 670MHz, PBGA896, ROHS COMPLIANT, FBGA-896]
分类和应用: 时钟LTE可编程逻辑
文件页数/大小: 184 页 / 1809 K
品牌: ALTERA [ ALTERA CORPORATION ]
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AV-51002  
2017.02.10  
1-6  
Recommended Operating Conditions  
Symbol  
Description  
Condition  
3.3 V  
3.0 V  
2.5 V  
1.8 V  
1.5 V  
1.35 V  
1.25 V  
1.2 V  
Minimum(1)  
3.135  
2.85  
Typical  
3.3  
Maximum(1)  
3.465  
3.15  
Unit  
V
3.0  
V
2.375  
1.71  
2.5  
2.625  
1.89  
V
1.8  
V
VCCIO  
I/O buffers power supply  
1.425  
1.283  
1.19  
1.5  
1.575  
1.418  
1.31  
V
1.35  
1.25  
1.2  
V
V
1.14  
1.26  
V
VCCD_FPLL  
VCCA_FPLL  
PLL digital voltage regulator power  
supply  
1.425  
1.5  
1.575  
V
PLL analog voltage regulator power  
supply  
2.375  
2.5  
2.625  
V
VI  
DC input voltage  
Output voltage  
–0.5  
0
3.6  
VCCIO  
85  
V
V
VO  
Commercial  
Industrial  
Standard POR  
Fast POR  
0
°C  
°C  
TJ  
Operating junction temperature  
Power supply ramp time  
–40  
200 µs  
200 µs  
100  
100 ms  
4 ms  
(4)  
tRAMP  
(1)  
(4)  
e power supply value describes the budget for the DC (static) power supply tolerance and does not include the dynamic tolerance requirements.  
Refer to the PDN tool for the additional budget for the dynamic tolerance requirements.  
is is also applicable to HPS power supply. For HPS power supply, refer to tRAMP specifications for standard POR when HPS_PORSEL= 0 and tRAMP  
specifications for fast POR when HPS_PORSEL= 1.  
Arria V GX, GT, SX, and ST Device Datasheet  
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Altera Corporation