Chapter 1: Overview for the Arria V Device Family
1–9
Low-Power Serial Transceivers
Table 1–6. Transceiver PCS Features for Arria V Devices (Part 2 of 2)
(1)
PCS Support
Data Rates (Gbps)
Transmitter Data Path
Receiver Data Path
The same as custom single- and
The same as custom single- and
double-width modes, plus the XAUI double-width modes, plus the XAUI
XAUI
3.125
state machine for bonding four
channels
state machine for realigning four
channels, and deskew FIFO circuitry
The same as custom single- and
double-width modes
The same as custom single- and
double-width modes
SRIO
SDI
1.25 to 6.25
Phase compensation FIFO, byte
serializer
Byte deserializer and phase
compensation FIFO
0.27 (3), 1.485, 2.97
Phase compensation FIFO, byte
deserializer, word aligner, and
8B/10B decoder
Phase compensation FIFO, byte
serializer, 8B/10B encoder
Serial ATA
CPRI (4)
1.5, 3.0, 6.0
The same as custom single- and
double-width modes, plus the TX
deterministic latency
The same as custom single- and
double-width modes, plus the RX
deterministic latency
0.6144 to 6.144
1.25 and 2.5
Phase compensation FIFO and byte Phase compensation FIFO and byte
serializer deserializer
(5)
GPON
Notes to Table 1–6:
(1) Data rates above 6.5536 Gbps up to 10.3125 Gbps, such as 10GBASE-R, are supported through soft PCS.
(2) PCIe Gen2 is supported with the PCIe hard IP only.
(3) The 0.27-Gbps data rate is supported using oversampling user logics that you must implement in the FPGA fabric.
(4) CPRI data rates above 6.5536 Gbps, such as 9.8304 Gbps, are supported through soft PCS.
(5) The GPON standard does not support burst mode.
February 2012 Altera Corporation
Arria V Device Handbook
Volume 1: Device Overview and Datasheet
ALTERA [ ALTERA CORPORATION ]
