P1818/19/20/21/22
®
Frequency vs. Deviation (P1818A and P1818H)
Deviation in P1818A
Deviation in P1818H
Frequency
SRS = 1
SRS = 0
D_C = 1
D_C = 0
10 MHz
15 MHz
20 MHz
-4.4%
-1.8%
-0.8%
-3.3%
-1.26%
-0.6%
-4.4%
-1.8%
-0.8%
±2.2%
±0.9%
±0.4%
Pin Description
Pin
number
Name
Type
Description
1
2
3
XIN
VSS
SRS
I
P
I
Connect to externally generated clock signal or crystal.
Ground Connection. Connect to system ground.
Spread Range Select. Digital logic input used to select frequency devi-
ation (see Spread Deviation Selections). This pin has an internal pull-
up resistor.
1
D_C
I
Digital logic input used to select Down (LOW) or Center (HIGH) Spread
Options (see Spread Deviation Selections). This pin has an internal
pull-up resistor.
3
4
5
ModOut
O
Spread Spectrum clock output (see Input Frequency and Modulation
Rate Selections and Spread Deviation Selections).
REF
FRS
O
I
Non-modulated reference output clock of the input frequency.
1
Frequency Range Select. Digital logic input used to select input fre-
quency range (see Input Frequency and Modulation Rate Selections).
This pin has an internal pull-up resistor.
5/6
1
PD#
I
Power-Down control pin. Pull LOW to enable Power-Down mode. This
pin has an internal pull-up resistor.
6
7
8
VDD
P
I
Connect to +3.3V
XOUT
Connect to crystal. No connect if externally generated clock signal is
used.
1
MRS
I
Modulation Rate Select. Digital logic input used to select Modulation
Rate (see Spread Deviation Selections). This pin has an internal pull-
up resistor.
8
1. Please refer to Figure 1 for pin assignment.
March 2003
4 of 8
Low Power Mobile VGA EMI Reduction IC
Notice: The information in this document is subject to change without notice.
ALSC [ ALLIANCE SEMICONDUCTOR CORPORATION ]
