AS7C4096
AS7C34096
®
Write cycle (over the operating range)11
–10
–12
–15
–20
Parameter
Write cycle time
Symbol Min
Max
–
Min
12
8
Max
–
Min
15
10
10
0
Max
–
Min
20
12
12
0
Max Unit Notes
t
t
t
10
7
–
–
–
–
–
–
–
–
–
–
9
–
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
WC
CW
AW
Chip enable (CE) to write end
Address setup to write end
Address setup time
–
–
–
7
–
8
–
–
t
0
–
0
–
–
AS
Write pulse width (OE = high)
Write pulse width (OE = low
Address hold from end of write
Write recovery time
t
t
7
–
8
–
10
15
0
–
12
20
0
WP1
WP2
10
0
–
12
0
–
–
t
–
–
–
AH
WR
DW
t
0
–
0
–
0
–
0
Data valid to write end
t
5
–
6
–
7
–
9
Data hold time
t
0
–
0
–
0
–
0
4, 5
4, 5
4, 5
DH
WZ
OW
Write enable to output in high Z
Output active from write end
t
0
5
0
6
0
7
0
t
3
–
3
–
3
–
3
Write waveform 1 (WE controlled)10,11
tWC
tAW
tWR
tAH
Address
tWP
WE
tAS
tDW
Data valid
tDH
DIN
tWZ
tOW
DOUT
Write waveform 2 (CE controlled)10,11
tWC
tWR
tAH
tAW
Address
tAS
tCW
CE
tWP
WE
tWZ
tDW
tDH
DIN
Data valid
DOUT
1/13/05; v.1.9
Alliance Semiconductor
P. 5 of 9
ALSC [ ALLIANCE SEMICONDUCTOR CORPORATION ]
