AS7C1024A
AS7C31024A
®
ꢁꢂꢅꢂꢀꢆ
Read cycle (over the operating range)
-10
-12
-15
-20
Parameter
Read cycle time
Symbol Min Max Min Max Min Max Min Max Unit
Notes
tRC
tAA
10
–
–
–
–
2
0
0
–
–
0
–
0
–
–
10
10
10
5
12
–
–
–
–
3
0
0
–
–
0
–
0
–
–
12
12
12
6
15
–
–
–
–
3
0
0
–
–
0
–
0
–
–
15
15
15
7
20
–
–
–
–
3
0
0
–
–
0
–
0
–
–
20
20
20
8
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Address access time
3
Chip enable (CE1) access time
Chip enable (CE2) access time
Output enable (OE) access time
Output hold from address change
CE1 Low to output in low Z
CE2 High to output in low Z
CE1 Low to output in high Z
CE2 Low to output in high Z
OE Low to output in low Z
OE High to output in high Z
Power up time
tACE1
tACE2
tOE
3, 12
3, 12
tOH
–
–
–
–
5
tCLZ1
tCLZ2
tCHZ1
tCHZ2
tOLZ
tOHZ
tPU
–
–
–
–
4, 5, 12
4, 5, 12
4, 5, 12
4, 5, 12
4, 5
–
–
–
–
3
3
4
5
3
3
4
5
–
–
–
–
3
3
4
5
4, 5
–
–
–
–
4, 5, 12
4, 5, 12
Power down time
tPD
10
12
15
20
Key to switching waveforms
Rising input
Falling input
Undefined / don’t care
ꢁꢂꢃꢂꢄꢂꢅꢂꢀꢆ
Read waveform 1 (address controlled)
t
RC
Address
t
t
AA
OH
D
Data valid
OUT
ꢁꢂꢃꢂꢇꢂꢅꢂꢀꢆ
Read waveform 2 (CE1, CE2, and OE controlled)
t
RC1
CE1
CE2
OE
t
OE
t
t
OHZ
OLZ
t
, t
CHZ1 CHZ2
t
,
ACE1 tACE2
D
OUT
Data valid
t
, t
CLZ1 CLZ2
t
t
PD
I
CC
PU
Current
supply
I
50%
50%
SB
9/ 26/ 02; 0.9.9
Alliance Semiconductor
P. 4 of 9