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AS6WA5128-55BC 参数 Datasheet PDF下载

AS6WA5128-55BC图片预览
型号: AS6WA5128-55BC
PDF下载: 下载PDF文件 查看货源
内容描述: [Standard SRAM, 512KX8, 55ns, CMOS, PBGA36, CSP, FBGA-48/36]
分类和应用: 静态存储器内存集成电路
文件页数/大小: 9 页 / 162 K
品牌: ALSC [ ALLIANCE SEMICONDUCTOR CORPORATION ]
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AS6WA5128
®
Read cycle (over the operating range)

Parameter
Read cycle time
Address access time
Chip select (CS) access time
Output enable (OE) access time
Output hold from address change
CS low to output in low Z
CS high to output in high Z
OE low to output in low Z
OE high to output in high Z
Power up time
Power down time
Symbol
t
RC
t
AA
t
ACS
t
OE
t
OH
t
CLZ
t
CHZ
t
OLZ
t
OHZ
t
PU
t
PD
Min
55
10
10
0
5
0
0
Max
55
55
25
20
20
55
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
5
4, 5
4, 5
4, 5
4, 5
4, 5
4, 5
3
3
Notes
Key to switching waveforms
Rising input
Falling input
Undefined/don’t care
Read waveform 1 (address controlled)

t
RC
Address
t
OH
D
OUT
Previous data valid
t
AA
Data valid
t
OH
Read waveform 2 (CS, OE controlled)

t
RC1
CS
t
OE
OE
t
OLZ
t
ACE
D
OUT
t
CLZ
Supply
current
t
PU
50%
Data valid
t
PD
50%
I
CC
I
SB
t
OHZ
t
CHZ
9/21/01; v.1.2
Alliance Semiconductor
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