AS6C1008L
128k x 8 BIT SUPER LOW POWER CMOS SRAM
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this
specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.
TRUTH TABLE
CE#
H
CE2
X
OE#
X
WE#
X
SUPPLY CURRENT
MODE
I/O OPERATION
High-Z
ISB1
Standby
X
L
X
X
High-Z
ISB1
L
H
H
H
Output Disable
Read
High-Z
ICC,ICC1
ICC,ICC1
ICC,ICC1
L
H
L
H
DOUT
L
H
X
L
Write
DIN
Note: H = VIH, L = VIL, X = Don't care.
DC ELECTRICAL CHARACTERISTICS
SYMBOL
TEST CONDITION
MIN.
2.7
0.7*Vcc
- 0.2
- 1
TYP. *4
3.0
MAX.
5.5
VCC+0.3
0.6
UNIT
PARAMETER
Supply Voltage
VCC
V
V
V
*1
Input High Voltage
Input Low Voltage
Input Leakage Current
Output Leakage
Current
VIH
-
-
-
*2
VIL
≧
≧
VCC VIN VSS
VCC ≧ VOUT ≧VSS,
Output Disabled
ILI
1
A
µ
ILO
- 1
-
1
A
µ
Output High Voltage
Output Low Voltage
VOH IOH = -1mA
VOL IOL = 2mA
Cycle time = Min.
2.2
-
2.7
-
-
V
V
0.4
CE# = VIL and CE2 = VIH,
II/O = 0mA
ICC
10
60
10
-
mA
Average Operating
Power supply Current
Cycle time = 1 s
µ
≦
≧
CE# 0.2V and CE2 VCC-0.2V,
ICC1
-
1
mA
II/O = 0mA
other pins at 0.2V or VCC-0.2V
≧
CE# VCC-0.2V
-
-
1
1
10
A
µ
-SL
≦
or CE2 0.2V
Standby Power
Supply Current
ISB1
Other pins at 0.2V
or Vcc-0.2V
-SLE/-SLI
10
A
µ
Notes:
1. VIH(max) = VCC + 3.0V for pulse width less than 10ns.
2. VIL(min) = VSS - 3.0V for pulse width less than 10ns.
3. Over/Undershoot specifications are characterized, not 100% tested.
4. Typical values are included for reference only and are not guaranteed or tested.
℃
Typical valued are measured at VCC = VCC(TYP.) and TA = 25
Confidential
- 4/15 -
Rev.2.a April 2016
ALSC [ ALLIANCE SEMICONDUCTOR CORPORATION ]
