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• Organization: 1,048,576 words × 16 bits
• High speed
- 100 ns RAS access time
- 50 ns hyper page cycle time
- 25 ns CAS access time
• 1024 refresh cycles, 16 ms refresh interval
- RAS-only or CAS-before-RAS refresh or self refresh
• Read-modify-write
• TTL-compatible, three-state DQ
• JEDEC standard package and pinout
- 400 mil, 42-pin SOJ
- 400 mil, 44/50-pin TSOP II
• Low power consumption
- Active: 100 mW max
- Standby: 2 mW max, CMOS DQ
• Extended data out
• 1.7V to 2.4V power supply
• 5V tolerant I/Os; 5.5V maximum V
IH
3LQDUUDQJHPHQW
SOJ
Vcc
DQ0
DQ1
DQ2
DQ3
Vcc
DQ4
DQ5
DQ6
DQ7
NC
NC
WE
RAS
NC
NC
A0
A1
A2
A3
Vcc
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
V
SS
DQ15
DQ14
DQ13
DQ12
V
SS
DQ11
DQ10
DQ9
DQ8
NC
LCAS
UCAS
OE
A9
A8
A7
A6
A5
A4
V
SS
V
CC
DQ0
DQ1
DQ2
DQ3
V
CC
DQ4
DQ5
DQ6
DQ7
NC
3LQGHVLJQDWLRQ
TSOP II
1
2
3
4
5
6
7
8
9
10
11
50
49
48
47
46
45
44
43
42
41
40
V
SS
DQ15
DQ14
DQ13
DQ12
V
SS
DQ11
DQ10
DQ9
DQ8
NC
Pin(s)
A0 to A9
RAS
DQ0 to DQ15
OE
WE
UCAS
LCAS
V
CC
V
SS
Description
Address inputs
Row address strobe
Input/output
Output enable
'5$0
Write enable
Column address strobe, upper byte
Column address strobe, lower byte
Power
Ground
NC
NC
WE
RAS
NC
NC
A0
A1
A2
A3
V
CC
15
16
17
18
19
20
21
22
23
24
25
36
35
34
33
32
31
30
29
28
27
26
NC
LCAS
UCAS
OE
A9
A8
A7
A6
A5
A4
V
SS
6HOHFWLRQJXLGH
Symbol
Maximum RAS access time
Maximum column address access time
Maximum CAS access time
Maximum output enable (OE) access time
Minimum read or write cycle time
Minimum hyper page mode cycle time
Maximum operating current
Maximum CMOS standby current
t
RAC
t
AA
t
CAC
t
OEA
t
RC
t
HPC
I
CC1
I
CC5
AS4SC1M16E5-100
100
50
25
25
150
50
40
50
Unit
ns
ns
ns
ns
ns
ns
mA
µA
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Copyright ©1998 Alliance Semiconductor. All rights reserved.
ALSC [ ALLIANCE SEMICONDUCTOR CORPORATION ]
