AS4LC2M8S1
AS4LC1M16S1
®
AC parameters common to all waveforms
Sym
t
AC
Parameter
CLK to valid output delay
CAS
latency
3
2
1
–7
Min
–
–
–
–
2
0
1
1
2.75
7
8.7
20
1
1
2
2.75
1
2
3
2
1
5
5
4
1
2
1
0
2
2
0
3
2
1
–
–
–
1
Max
5.5
8.5
18
1
–
–
–
–
–
1000
1000
1000
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
5.5
8.5
18
–
Min
–
–
–
–
2
0
1
1
3
8
10
25
1
1
2
3
1
2
5
5
4
1
2
1
0
2
2
0
–
–
–
1
–8
Max
6
7
22
1
–
–
–
–
–
1000
1000
1000
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
6
9
22
–
Min
–
–
–
–
2
0
1
1
3
10
12
25
1
1
2
3.5
1
2
5
5
4
1
2
1
0
2
2
0
–
–
–
1
–10
Max
6
6
22
1
–
–
–
–
–
1000
1000
1000
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
9
9
22
–
Unit
ns
ns
ns
ns
ns
t
CK
t
CK
t
CK
ns
ns
ns
ns
t
CK
ns
ns
ns
ns
ns
t
CK
t
CK
t
CK
ns
t
CK
t
CK
t
CK
t
CK
ns
t
CK
ns
ns
ns
ns
9
13
13
13
5,11
5,11
5,11
12
9
9
9
Notes
6
6,8
6,8
7
7
9
9
9
7
10
10
10
t
AH
Address hold time
t
AS
Address setup time
t
BDL
Last data-in to burst stop
Read/write command to
t
CCD
read/write command
Last data-in to new
t
CDL
column address delay
t
CH
CLK high-level width
t
CK
t
CKED
t
CKH
t
CKS
t
CL
t
CMH
t
CMS
t
DAL
CLK cycle time
CKE to CLOCK disable or
power-down entry mode
CKE hold time
CKE setup time
CLK low-level width
CS, RAS, CAS, WE, DQM
hold time
CS, RAS, CAS, WE, DQM
setup time
Data-in to ACTIVE
command
3
2
1
7
t
DH
Data in hold time
t
DPL
Data in to PRECHARGE
t
DQD
DQM to input data delay
DQM to data mask during
t
DQM
writes
DQM to data high Z
t
DQZ
during reads
t
DS
Data in setup time
Write command to input
t
DWD
data delay
t
HZ
t
LZ
Data-out high-impedance
time
Data-out low-impedance
time
5/21/01; v.1.1
Alliance Semiconductor
P. 8 of 29
ALSC [ ALLIANCE SEMICONDUCTOR CORPORATION ]
