AS4C8M16D1
tWTR
tXSNR
tRAP
Internal Write to Read command delay
Exit Self-Refresh to non-Read command
Active to Autoprecharge delay
2
-
-
-
tCK
75
ns
ns
tRASmin
Table 16. Recommended A.C. Operating Conditions
(VDD = 2.5V 5%, TA = -40~85 C)
Parameter
Input High Voltage (AC)
Symbol
VIH (AC)
VIL (AC)
VID (AC)
Min.
+ 0.35
Max.
Unit
V
V
REF
-
Input Low Voltage (AC)
-
V
– 0.35
V
REF
0.7
V
0.6
V
DDQ +
Input Different Voltage, CK and
inputs
CK
VIX (AC)
0.5*V -0.2
DDQ
0.5*V +0.2
DDQ
V
Input Crossing Point Voltage, CK and
inputs
CK
Note:
1. All voltages are referenced to VSS.
2. These parameters depend on the cycle rate and these values are measured by the cycle rate under the minimum
value of tCK and tRC. Input signals are changed one time during tCK
3. Power-up sequence is described in Note 5.
4. A.C. Test Conditions
.
Table 17. SSTL _2 Interface
Reference Level of Output Signals (VREF
)
0.5 * V
DDQ
Output Load
Reference to the Test Load
VREF+0.35 V / VREF-0.35V
1 V/ns
Input Signal Levels(VIH / VIL)
Input Signals Slew Rate
Reference Level of Input Signals
0.5 * V
DDQ
Figure 4. SSTL_2 A.C. Test Load
0.5 * VDDQ
50Ω
DQ, DQS
Z0=50Ω
30pF
Alliance Memory Inc. Confidential
13
Rev. 1.1
Feb. /2009
ALSC [ ALLIANCE SEMICONDUCTOR CORPORATION ]
