AS4C256M8D3
Figure 3. State Diagram
This simplified State Diagram is intended to provide an overview of the possible state transitions and the commands
to control them. In particular, situations involving more than one bank, the enabling or disabling of on-die termination,
and some other events are not captured in full detail.
Power
applied
MRS,MPR,
Write
Leveling
Power
On
Reset
Procedure
Self
Refresh
Initialization
ZQCL
E
S
R
from any
state
S
MRS
Idle
X
RESET
R
ZQCL,ZQCS
ZQ
Calibration
REF
Refreshing
P
D
E
P
D
ACT
X
ACT = Active
PRE = Precharge
Active
Power
Down
Precharge
Power
Down
Activating
PREA = Precharge All
MRS = Mode Register Set
REF = Refresh
RESET = Start RESET Procedure
Bank
Activating
Read = RD, RDS4, RDS8
Read A = RDA, RDAS4, RDAS8
Write = WR, WRS4, WRS8
READ
WRITE
Write A = WRA, WRAS4, WRAS8
ZQCL = ZQ Calibration Long
ZQCS = ZQ Calibration Short
READ
Reading
Writing
WRITE A
Writing
WRITE
PDE = Enter Power-down
PDX = Exit Power-down
SRE = Self-Refresh entry
SRX = Self-Refresh exit
REA
D A
MPR = Multi-Purpose Register
Reading
Automatic Sequence
Command Sequence
Precharging
Confidential
5
Rev. 3.0
Aug. /2014
ALSC [ ALLIANCE SEMICONDUCTOR CORPORATION ]
