AS4C128M16D2
On-Die Termination (ODT)
On Die Termination (ODT) is a feature that allows a DRAM to turn on/off termination resistance for each DQ,
UDQS/UDQS, LDQS/LDQS, UDM and LDM via the ODT control pin. The ODT feature is designed to improve signal
integrity of the memory channel by allowing the DRAM controller to independently turn on/off termination
resistance for any or all DRAM devices.
The ODT function is supported for ACTIVE and STANDBY modes. ODT is turned off and not supported in SELF
REFRESH mode.
VDDQ
sw1
VDDQ
VDDQ
sw2
sw3
Rval3
Rval2
Rval1
DRAM
Input
Buffer
Input
Pin
Rval1
sw1
Rval2
sw2
Rval3
sw3
VSSQ
VSSQ
Switch (sw1, sw2, sw3) is enabled by ODT pin.
Selection among sw1, sw2, and sw3 is determined by “Rtt (nominal)” in EMR.
VSSQ
Termination
included on all
DQs, UDQS/UDQS, LDQS/LDQS, UDM and LDM pins.
Functional representation of ODT
Confidential
12
Version 2.0 – Oct/2014
ALSC [ ALLIANCE SEMICONDUCTOR CORPORATION ]
