February 2002
Advance information
AS3LC2M16
2.7V to 3.3V 2M X 16 Intelliwatt
TM
Super Low-Power CMOS Pseudo Static SRAM
Features
•
•
•
•
•
•
•
AS3LC2M16
Intelliwatt™ active power circuitry
Industrial, commercial and extended temperature ranges
Organization: 2M words × 16 bits
2.7V to 3.3V power supply range
Fast access times of 55/70/85 ns
Low power consumption: ACTIVE
- 150 mW max at 3.3V and 55 ns
- 330 µW max at 3.3V
Deep power down mode
Equal access and cycle times
4 word Page Read Operation
Known good die availability
Smallest footprint package
- 48-ball FBGA; 6.0 x 8.0 mm
• ESD protection
≥
2000 volts
• Latch-up current
≥
200 mA
•
•
•
•
•
• Low power consumption: STANDBY
Logic block diagram
Row Addresses
Row Decoder
V
CC
2M × 16
Array
(33,554,432)
V
SS
Pin arrangement (top view)
48-Fine Ball-Grid-Array Package
I/O0–I/O7
I/O8–I/O15
WE
I/O
buffer
Control circuit
Column decoder
A
B
C
D
E
F
G
H
'18
1
LB
I/O8
I/O9
V
SS
V
CC
I/O14
I/O15
A18
2
OE
UB
I/O10
I/O11
I/O12
I/O13
A19
A8
3
A0
A3
A5
A17
DNU
1
A14
A12
A9
4
A1
A4
A6
A7
A16
A15
A13
A10
5
A2
CS
I/O1
I/O3
I/O4
I/O5
WE
A11
6
ZZ
I/O0
I/O2
V
CC
V
SS
I/O6
I/O7
A20
'R 1RW 8VH
Column Addresses
UB
OE
LB
CS
ZZ
Selection guide
V
CC
Range
Product
AS3LC2M16-55
AS3LC2M16-70
AS3LC2M16-85
Min
(V)
2.7
2.7
2.7
Typ
(V)
3.0
3.0
3.0
Max
(V)
3.3
3.3
3.3
Speed
(ns)
55
70
85
Power Dissipation
Operating (I
CC1
)
Max (mA)
5
5
5
Standby (I
SB1
)
Max (
µ
A)
100
100
100
2/15/02; V.0.9.9
Alliance Semiconductor
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