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AS29F400B-120TC 参数 Datasheet PDF下载

AS29F400B-120TC图片预览
型号: AS29F400B-120TC
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash, 512KX8, 120ns, PDSO48, 12 X 20 MM, TSOP1-48]
分类和应用: 光电二极管内存集成电路
文件页数/大小: 20 页 / 444 K
品牌: ALSC [ ALLIANCE SEMICONDUCTOR CORPORATION ]
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AS29F400  
Preliminary information  
Operating modes  
®
Mode  
CE  
OE  
L
WE  
A0  
L
A1  
A6  
L
A9  
RESET  
H
DQ  
ID read MFR code  
ID read device code  
Read  
L
L
L
H
L
L
L
L
L
H
L
V
V
Code  
Code  
ID  
ID  
L
H
H
A0  
X
L
L
H
L
H
A1  
X
A6  
X
A9  
X
H
D
OUT  
Standby  
X
H
H
X
H
High Z  
High Z  
Output disable  
Write  
H
X
X
X
X
H
L
A0  
L
A1  
H
H
H
A6  
L
A9  
H
D
X
X
IN  
Enable sector protect  
Sector unprotect  
Verify sector protect  
V
V
L
Pulse/L  
Pulse/L  
H
V
V
V
H
ID  
ID  
ID  
ID  
ID  
L
H
L
H
L
H
Code  
Temporary sector  
unprotect  
X
X
X
X
X
X
X
X
X
X
X
X
X
X
V
L
X
ID  
Hardware Reset  
High Z  
L = Low (<VIL); H = High (>VIH); VID = 12.0 ± 0.5V; X = don’t care; In ×16 mode, BYTE = VIH. In ×8 mode, BYTE = VIL and DQ8–14 is High Z with  
DQ15 = A-1(X).  
Mode definitions  
Item  
Description  
Selected by A9 = V (11.5–12.5V), CE = OE = A1 = A6 = L, enabling outputs.  
ID  
ID MFR code,  
device code  
When A0 is low (V ) the output data = 52h, a unique Mfr. code for Alliance Semiconductor Flash products.  
IL  
When A0 is high (V ), D  
represents the device code for the 29F400.  
IH  
OUT  
Selected with CE = OE = L, WE = H. Data is valid in t  
time after addresses are stable, t after CE is low  
CE  
ACC  
Read mode  
Standby  
and t after OE is low.  
OE  
Selected with CE = H. Part is powered down, and I reduced to <1.0 mA for TTL input levels and <100 µA  
CC  
for CMOS levels. If activated during an automated on-chip algorithm, the device completes the operation  
before entering standby.  
Output disable Part remains powered up; but outputs disabled with OE pulled high.  
Selected with CE = WE = L, OE = H. Accomplish all Flash erasure and programming through the command  
register. Contents of command register serve as inputs to the internal state machine. Address latching occurs  
on the falling edge of WE or CE, whichever occurs later. Data latching occurs on the rising edge WE or CE,  
Write  
whichever occurs first. Filters on WE prevent spurious noise events from appearing as write commands.  
Enable  
Hardware protection circuitry implemented with external programming equipment causes the device to  
sector protect disable program and erase operations for specified sectors.  
Sector  
Disables sector protection using external programming equipment.  
unprotect  
Verifies write protection for sector. Sectors are protected from program/erase operations on commercial  
Verify  
programming equipment. Determine if sector protection exists in a system by writing the ID read command  
sector protect sequence and reading location XXX02h, where address bits A12–17 select the defined sector addresses. A  
logical 1 on DQ0 indicates a protected sector; a logical 0 indicates an unprotected sector.  
Temporarily disables sector protection for in-system data changes to protected sectors. Apply +12V to RESET  
to activate temporary sector unprotect mode. During temporary sector unprotect mode, program protected  
sectors by selecting the appropriate sector address. All protected sectors revert to protected state on removal  
of +12V from RESET.  
Temporary  
sector  
unprotect  
3