High Performance
512K×8/256K×16
5V CMOS Flash EEPROM
AS29F400
®
512K×8/256K×16 CMOS Flash EEPROM
Preliminary information
Features
• Organization: 512K×8 or 256K×16
• Sector architecture
- One 16K; two 8K; one 32K; and seven 64K byte sectors
- Boot code sector architecture—T (top) or B (bottom)
- Erase any combination of sectors or full chip
• Low power consumption
- 35 mA maximum read current
- 60 mA maximum program current
- 1 µA typical standby current (RESET = 0)
• JEDEC standard software, packages and pinouts
- 48-pin TSOP
- 44-pin SO
• Single 5.0±0.5V power supply for read/write operations
• Sector protection
• High speed 55/70/90/120/150 ns address access time
• Automated on-chip programming algorithm
- Automatically programs/verifies data at specified address
• Detection of program/erase cycle completion
- DQ7 DATA polling
- DQ6 toggle bit
- RY/BY output
• Automated on-chip erase algorithm
- Automatically preprograms/erases chip or specified sectors
• Erase suspend/resume
- Supports reading data from or programming data to a sector
not being erased
• 10,000 write/erase cycle endurance
• Hardware RESET pin
- Resets internal state machine to read mode
• Low V
CC
write lock-out below 3.2V
Logic block diagram
RY/BY
V
CC
V
SS
RESET
Program/erase
control
Command
register
CE
OE
A-1
Program voltage
generator
Chip enable
Output enable
Logic
STB
Data latch
Sector protect
switches
Erase voltage
generator
DQ0–DQ15
Pin arrangement
48-pin TSOP
A15
A14
A13
A12
A11
A10
A9
A8
NC
NC
WE
RESET
NC
NC
RY/BY
NC
A17
A7
A6
A5
A4
A3
A2
A1
NC
RY/BY
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
A17
A7
A6
A5
A4
A3
1
2
3
4
5
6
44
43
42
41
40
39
RESET
WE
A8
A9
A10
A11
A12
A13
A14
A15
A16
BYTE
V
SS
DQ15/A-1
DQ7
DQ14
DQ6
DQ13
DQ5
DQ12
DQ4
V
CC
44-pin SO
Input/output
buffers
WE
BYTE
AS29F400
A2
A1
A0
CE
V
SS
OE
DQ0
9
10
11
12
13
14
15
16
17
18
19
20
21
22
AS29F400
7
8
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
Address latch
STB
V
CC
detector
Timer
Y decoder
Y gating
DQ8
DQ1
DQ9
DQ2
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
X decoder
Cell matrix
A16
BYTE
V
SS
DQ15/A-1
DQ7
DQ14
DQ6
DQ13
DQ5
DQ12
DQ4
V
CC
DQ11
DQ3
DQ10
DQ2
DQ9
DQ1
DQ8
DQ0
OE
V
SS
CE
A0
DQ10
DQ3
DQ11
A0–A17
Selection guide
29F400-55
Maximum access time
Maximum chip enable access time
Maximum output enable access time
t
AA
t
CE
t
OE
55
55
25
29F400-70
70
70
30
29F400-90
90
90
35
29F400-120 29F400-150 Unit
120
120
50
150
150
55
ns
ns
ns
ALLIANCE SEMICONDUCTOR
1
ALSC [ ALLIANCE SEMICONDUCTOR CORPORATION ]
