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Item
Description
Erase suspend allows interruption of sector erase operations to perform data reads from a sector not
being erased. Erase suspend applies only during sector erase operations, including the time-out
period. Writing an Erase Suspend command during sector erase time-out results in immediate
termination of time-out period and suspension of erase operation.
AS29F200 ignores any commands during erase suspend other than the Reset or Erase Resume
commands. Writing erase resume continues erase operations. Addresses are DON’T CARE when
writing Erase Suspend or Erase Resume commands.
AS29F200 takes 0.2–15 µs to suspend erase operations after receiving Erase Suspend command.
Check completion of erase suspend by polling RY/ BY. Check DQ2 in conjunction with DQ6 to
determine if a sector is being erased. AS29F200 ignores redundant writes of erase suspend.
Erase Suspend
AS29F200 defaults to erase-suspend-read mode while an erase operation has been suspended.
While in erase-suspend-read mode AS29F200 allows reading data from or programming data to
any sector not undergoing sector erase.
Write the Resume command 30h to continue operation of sector erase. AS29F200 ignores
redundant writes of the Resume command. AS29F200 permits multiple suspend/ resume
operations during sector erase.
When attempting to write to a protected sector, DATA polling andToggle Bit 1 (DQ6) are activated
for about <1 µs. When attempting to erase a protected sector, DATA polling and
Toggle Bit 1 (DQ6) are activated for about <5 µs. In both cases, the device returns to read mode
without altering the specified sectors.
Sector Protect
Ready/ Busy
RY/ BY indicates whether an automated on-chip algorithm is in progress (RY/ BY = low) or
completed (RY/ BY = high). The device does not accept program/ erase commands when
RY/ BY = low. RY/ BY= high when device is in erase suspend mode. RY/ BY is an open drain output,
enabling multiple RY/ BY pins to be tied in parallel with a pull up resistor to VCC.
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Only active during automated on-chip algorithms or sector erase time outs. DQ7 reflects
complement of data last written when read during the automated on-chip algorithm (0 during
erase algorithm); reflects true data when read after completion of an automated on-chip algorithm
(1 after completion of erase agorithm).
DATA polling (DQ7)
Active during automated on-chip algorithms or sector erase time outs. DQ6 toggles when CE or OE
toggles, or an Erase Resume command is invoked. DQ6 is valid after the rising edge of the fourth
pulse of WE during programming; after the rising edge of the sixth WE pulse during chip erase;
after the last rising edge of the sector erase WE pulse for sector erase. For protected sectors, DQ6
toggles for only <1 µs during writes, and <5 µs during erase (if all selected sectors are protected).
Toggle bit (DQ6)
Indicates unsuccessful completion of program/ erase operation (DQ5 = 1). DATA polling remains
active; CE powers the device down to 2 mA. If DQ5 = 1 during chip erase, all or some sectors are
defective; during byte programming, the entire sector is defective; during sector erase, the sector is
defective (in this case, reset the device and execute a program or erase command sequence to
continue working with functional sectors). Attempting to program 0 to 1 will set DQ5 = 1.
Exceeding time limit
(DQ5)
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ALSC [ ALLIANCE SEMICONDUCTOR CORPORATION ]
