STR-S6525
OFF-LINE
SWITCHING REGULATOR
600
500
400
300
200
100
0
SINGLE PULSE
DRAIN CURRENT = 5 A
SUPPLY VOLTAGE = 50 V
ALLOWABLE AVALANCHE ENERGY
0
20
40
60
80
100
120
140
160
STARTING CHANNEL TEMPERATURE in °C
Dwg. GK-009-1
ELECTRICAL CHARACTERISTICS at T = +25°C, V = 18 V, voltage measurements are referenced to
A
IN
Common (pin 3) (unless otherwise noted).
Limits
Characteristic
Symbol
VINT
Test Conditions
Min. Typ. Max. Units
On-State Voltage
Turn-on, increasing VIN
Turn-off, decreasing VIN
14.4
9.0
26
–
–
–
–
–
17.6
11
V
V
Under-Voltage Lockout
Over-Voltage Threshold
FET Leakage Current
FET ON Resistance
Output Fall Time
VINQ
VOVP(th)
IDSS
rDS(on)
tf
31
V
VDS = 600 V
300
µA
Ω
VGS = 10 V, ID = 3 A
VDD = 200 V, ID = 5 A, 10% to 90% VDS
IFDBK = 0
–
1.0 1.25
–
–
–
250
33
62
800
–
ns
µs
µs
mV
mV
V
Maximum ON Time
ton
27
50
700
–
Minimum OFF Time
toff
–
Over-Current Threshold
Feedback Threshold
Soft-Start Voltage
VOCP(th)
VFDBK(th)
VSS
–
750
–
8.7
–
9.7
–
Sync. Trigger Threshold Volt.
Fault-Latch Trig. Threshold
Fault-Latch Holding Current
Fault-Latch Reset Voltage
Insulation RMS Voltage
VSYNC(th)
VFL(th)
IINH
3.0
–
V
680
–
880
mV
µA
V
VIN reduced from 31 V to 8.5 V
340 400
VINQ
I
IN ≤ 20 µA, VIN reduced from 31 V
6.5
2000
–
–
8.5
–
VWM(RMS)
All terminals simultaneous reference
metal plate against backside
V
Supply Current
IIN(ON)
IIN(OFF)
TJ
Operating
9.0
–
–
–
15
200
–
mA
µA
Start up, VIN =14 V
Thermal Shutdown
Thermal Resistance
125 150
2.0
°C
RθJM
FET junction to mounting surface
–
–
°C/W
NOTES: Negative current is defined as coming out of (sourcing) the specified device terminal.
Typical Data is for design information only.
ALLEGRO [ ALLEGRO MICROSYSTEMS ]
