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3932
THREE-PHASE POWER MOSFET CONTROLLER
APPLICATION INFORMATION
3) Undervoltage. VREG supplies the low side gate
Synchronous Rectification. To reduce power
consumption in the external MOSFETs, the 3932 control
logic will turn on the appropriate driver during the load
current recirculation, PWM “off” cycle. The intrinsic body
diode of the power MOSFET will only conduct during the
dead time required at each PWM transition.
driver and the bootstrap charge current. It is critical to
ensure that the voltages are at a proper level before
enabling any of the outputs. The undervoltage circuit is
active during power up and will force a motor coast
condition until VREG is greater than approximately
10V.
Decoupling. The internal reference VREG supplies
current for the gate drive circuit. As the gates are driven high
they will require current from an external decoupling
capacitor to support the transients. This capacitor should be
placed as close as possible to the VREG pin. The value of
the capacitor should be at least 20 times larger than the
bootstrap capacitor. Additionally, a 1nF ceramic monolithic
capacitor should be connected between LCAP and AGND as
close to the device pins as possible.
4) Hall Invalid. Illegal codes for the hall inputs (000/111)
will force a fault and coast the motor.
5) Thermal Shutdown. Junction temperature greater
than 165°C will signal a fault and coast the motor.
6) Motor Lead. The 3932 will signal a fault if the motor
lead is shorted to ground or supply. The status is
checked after any high side has turned on.
Protection Circuitry. The A3932 will protect the
external MOSFETs by turning off all MOSFETs if any of the
following fault conditions are detected.
Faults are cleared at the beginning of each commutation. If a
stalled motor results from a fault, the fault can only be
cleared by toggling the RESET pin or by a power up
sequence.
1) Gate Source Monitor (high side only). The
voltage on GHx pins must stay within 3.3V of the
bootstrap capacitor voltage during an ON cycle. If this
voltage droops below this threshold the high side turns
off, and the low side gate will turn on in an attempt to
recharge the bootstrap capacitor. When the bootstrap
capacitor has been properly charged, the high side is
turned back on. The circuit will allow three faults of this
type within one commutation cycle before signaling a
fault and coast the motor.
2) Bootstrap Monitor. The bootstrap capacitor is
charged whenever a sink side FET is on, Sx output goes
low, and load current recirculates. This happens
constantly during normal operation. A 170µs timer is
started at the beginning of this cycle and the capacitor is
charged with typically 100 mA. If the charge current
remains higher than 13mA or the Sx node remains
higher than 2V for longer than the 170µs a fault will be
signaled and the motor will coast.
ALLEGRO [ ALLEGRO MICROSYSTEMS ]
