V
S
=
±
2.5V -55
°
C
≤
T
A
≤
+125
°
C unless otherwise specified
1726E
Parameter
Initial Input offset Voltage
Input Offset Current
Input Bias Current
Initial Power Supply
Rejection Ratio
8
Initial Common Mode
RejectionRatio
8
Large Signal Voltage Gain
Output Voltage Range
Symbol
VOS i
I OS
IB
PSRR i
75
Min
Typ
0.7
2.0
2.0
75
Max
Min
1726
Typ
0.7
2.0
2.0
Max
Unit
mV
nA
nA
dB
RS
≤
1MΩ
Test Conditions
RS
≤
100KΩ
CMRR i
83
83
dB
RS
≤
1MΩ
AV
VO low
VO high
15
50
-2.40
2.40
-2.30
15
50
-2.40
2.40
-2.30
V/mV
V
V
RL = 1MΩ
2.30
2.30
R L = 1MΩ
T
A
= 25
o
C V
S
=
±
1.0V unless otherwise specified
1726E
Parameter
Initial Power Supply
8
Rejection Ratio
Initial Common Mode
Rejection Ratio
8
Large Signal Voltage Gain
Output Voltage Range
Symbol
PSRR i
Min
Typ
70
Max
Min
1726
Typ
70
Max
Unit
dB
Test Conditions
RS
≤
1MΩ
CMRRi
70
70
dB
RS
≤
1MΩ
AV
VO low
VO high
0.9
50
-0.95
0.95
0.3
0.17
-0.9
0.90
50
-0.95
0.95
0.3
0.17
-0.90
V/mV
V
RL = 1MΩ
R L = 1MΩ
Bandwidth
Slew Rate
BW
SR
MHz
V/µs
AV = +1, C L = 50pF
ALD1726E/ALD1726
Advanced Linear Devices
5