V
S
=
±
2.5V -55
°
C
≤
T
A
≤
+125
°
C unless otherwise specified
1722E
Parameter
Initial Input Offset Voltage
Input Offset Current
Input Bias Current
Initial Power Supply
Rejection Ratio
8
1722
Max
Min
Typ
0.7
2.0
2.0
2.0
2.0
85
Max
Unit
mV
nA
nA
dB
RS
≤
100KΩ
Test Conditions
RS
≤
100KΩ
Symbol
VOS i
IOS
IB
PSRR i
Min
Typ
0.5
85
Initial Common Mode
8
RejectionRatio
Large Signal Voltage Gain
Output Voltage Range
CMRR i
97
97
dB
RS
≤
100KΩ
AV
VO low
VO high
10
25
-2.4
2.4
-2.3
10
25
-2.4
2.4
-2.3
V/mV
V
V
RL
≤
10KΩ
RL
≤
10KΩ
2.3
2.3
T
A
= 25
o
C V
S
=
±
5.0V unless otherwise specified
1722E
Parameter
Initial Power Supply
Rejection Ratio
8
Initial Common Mode
8
Rejection Ratio
Large Signal Voltage Gain
Output Voltage Range
Symbol
PSRR
i
Min
Typ
85
Max
Min
1722
Typ
85
Max
Unit
dB
Test Conditions
R
S
≤
100KΩ
CMRR
i
97
97
dB
R
S
≤
100KΩ
A
V
V
O
low
V
O
high
B
W
S
R
250
-4.90
4.93
1.7
2.8
-4.80
4.80
250
-4.90
4.93
1.7
2.8
-4.80
V/mV
V
R
L
= 10KΩ
R
L
= 10KΩ
4.80
Bandwidth
Slew Rate
MHz
V/µs
A
V
= +1, C
L
= 50pF
ALD1722E/ALD1722
Advanced Linear Devices
5