V = ±2.5V -55°C ≤ T ≤ +125°C unless otherwise specified
S
A
1721E
Typ
1721
Typ
Parameter
Symbol
Min
Max
Min
Max
Unit
mV
nA
Test Conditions
Initial Input offset Voltage
Input Offset Current
Input Bias Current
V
0.5
0.8
R
≤ 100KΩ
OS i
S
I
I
2.0
2.0
2.0
2.0
OS
nA
B
Initial Power Supply
Rejection Ratio 8
PSRR
75
83
50
75
83
50
dB
R
≤ 100KΩ
≤ 100KΩ
= 100KΩ
= 100KΩ
i
S
Initial Common Mode
Rejection Ratio 8
CMRR
dB
R
S
i
Large Signal Voltage Gain
Output Voltage Range
A
15
15
V/mV
R
L
V
V
V
low
-2.47
2.45
-2.40
-2.47
2.45
-2.40
V
V
O
O
high
2.35
2.35
R
L
T = 25oC V = ±5.0V unless otherwise specified
A
S
1721E
Typ
1721
Typ
Parameter
Symbol
Min
Max
Min
Max
Unit
Test Conditions
Initial Power Supply
Rejection Ratio 8
PSRR
CMRR
83
83
83
83
dB
R
R
≤ 100KΩ
≤ 100KΩ
i
S
S
Initial Common Mode
Rejection Ratio 8
dB
i
Large Signal Voltage Gain
Output Voltage Range
A
250
250
V/mV
V
R
R
= 100KΩ
= 100KΩ
V
L
L
V
V
low
-4.98
4.98
-4.90
-4.98
4.98
-4.90
O
O
high
4.90
4.90
Bandwidth
Slew Rate
B
S
1.0
1.0
1.0
1.0
MHz
W
R
V/µs
A
= +1, C = 50pF
V
L
ALD1721E/ALD1721
Advanced Linear Devices
5
ALD [ ADVANCED LINEAR DEVICES ]
