V
S
=
±
2.5V -55
°
C
≤
T
A
≤
+125
°
C unless otherwise specified
1721E
Parameter
Initial Input offset Voltage
Input Offset Current
Input Bias Current
Initial Power Supply
Rejection Ratio
8
Initial Common Mode
Rejection Ratio
8
Large Signal Voltage Gain
Output Voltage Range
Symbol
VOS i
IOS
IB
PSRR i
75
Min
Typ
0.5
2.0
2.0
75
Max
Min
1721
Typ
0.8
2.0
2.0
Max
Unit
mV
nA
nA
dB
RS
≤
100KΩ
Test Conditions
RS
≤
100KΩ
CMRR i
83
83
dB
RS
≤
100KΩ
AV
VO low
VO high
15
50
-2.47
2.45
-2.40
15
50
-2.47
2.45
-2.40
V/mV
V
V
RL = 100KΩ
2.35
2.35
RL = 100KΩ
T
A
= 25
o
C V
S
=
±
5.0V unless otherwise specified
1721E
Parameter
Initial Power Supply
8
Rejection Ratio
Initial Common Mode
Rejection Ratio
8
Large Signal Voltage Gain
Output Voltage Range
Symbol
PSRR i
Min
Typ
83
Max
Min
1721
Typ
83
Max
Unit
dB
Test Conditions
RS
≤
100KΩ
CMRRi
83
83
dB
RS
≤
100KΩ
AV
VO low
VO high
4.90
250
-4.98
4.98
1.0
1.0
-4.90
4.90
250
-4.98
4.98
1.0
1.0
-4.90
V/mV
V
RL = 100KΩ
R L = 100KΩ
Bandwidth
Slew Rate
BW
SR
MHz
V/µs
AV = +1, C L = 50pF
ALD1721E/ALD1721
Advanced Linear Devices
5
ALD [ ADVANCED LINEAR DEVICES ]
