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AK5357ETP/P 参数 Datasheet PDF下载

AK5357ETP/P图片预览
型号: AK5357ETP/P
PDF下载: 下载PDF文件 查看货源
内容描述: [ADC, Delta-Sigma, 24-Bit, 1 Func, 2 Channel, Serial Access, PDSO16, 0.65 MM PITCH, LEAD FREE, PLASTIC, TSSOP-16]
分类和应用:
文件页数/大小: 20 页 / 294 K
品牌: AKM [ ASAHI KASEI MICROSYSTEMS ]
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[AK5357]  
SWITCHING CHARACTERISTICS  
(Ta=Tmin Tmax; VA=VD=2.7 5.5V; CL=20pF)  
Parameter  
Symbol  
min  
typ  
max  
Units  
Master Clock Timing  
Frequency  
fCLK  
tCLKL  
tCLKH  
1.024  
36.864  
MHz  
ns  
Pulse Width Low  
Pulse Width High  
0.4/fCLK  
0.4/fCLK  
ns  
LRCK Frequency  
fs  
4
96  
55  
kHz  
%
Duty Cycle  
Slave mode  
45  
Master mode  
50  
%
Audio Interface Timing  
Slave mode  
SCLK Period  
tSCK  
tSCKL  
tSCKH  
tLRSH  
tSHLR  
tLRS  
160  
65  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
SCLK Pulse Width Low  
Pulse Width High  
65  
LRCK Edge to SCLK “”  
SCLK “” to LRCK Edge  
(Note 11)  
(Note 11)  
30  
30  
LRCK to SDTO (MSB) (Except I2S mode)  
SCLK “” to SDTO  
Master mode  
35  
35  
tSSD  
SCLK Frequency  
fSCK  
dSCK  
tMSLR  
tSSD  
64fs  
50  
Hz  
%
SCLK Duty  
SCLK “” to LRCK  
SCLK “” to SDTO  
20  
20  
20  
35  
ns  
ns  
Reset Timing  
PDN Pulse Width  
tPD  
150  
ns  
(Note 12)  
tPDV  
tPDV  
4132  
4129  
1/fs  
1/fs  
PDN “” to SDTO valid at Slave Mode (Note 13)  
PDN “” to SDTO valid at Master Mode (Note 13)  
Note 11. SCLK rising edge must not occur at the same time as LRCK edge.  
Note 12. The AK5357 can be reset by bringing the PDN pin = “L”.  
Note 13. This cycle is the number of LRCK rising edges from the PDN pin = “H”.  
MS0294-E-03  
2009/03  
- 8 -  
 
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