ASAHI KASEI
[AK5355]
SWITCHING CHARACTERISTICS
(Ta=25°C; VA, VD=2.1
∼
3.6V; C
L
=20pF)
Parameter
Symbol
min
typ
Control Clock Frequency
Master Clock (MCLK)
11.2896
2.048
fCLK
256fs: Frequency
28
tCLKL
Pulse Width Low
28
tCLKH
Pulse Width High
16.9344
3.072
fCLK
384fs: Frequency
23
tCLKL
Pulse Width Low
23
tCLKH
Pulse Width High
22.5792
4.096
fCLK
512fs: Frequency
16
tCLKL
Pulse Width Low
16
tCLKH
Pulse Width High
44.1
8
fs
Channel Clock (LRCK)
Frequency
45
duty
Duty Cycle
Audio Interface Timing
312.5
tBLK
BCLK Period
130
tBLKL
BCLK Pulse Width Low
130
tBLKH
Pulse Width High
-tBLKH+50
tBLR
BCLK “↓” to LRCK
tDLR
LRCK Edge to SDTO (MSB)
tDSS
BCLK “↓” to SDTO
Reset / Initializing Timing
150
tPW
PDN Pulse Width
tPWV
4128
PDN “↑” to SDTO
(Note 8)
Note 8. This is the number of LRCK rising after the PDN pin is pulled high.
max
Units
12.8
19.2
25.6
50
55
MHz
ns
ns
MHz
ns
ns
MHz
ns
ns
kHz
%
ns
ns
ns
ns
ns
ns
ns
1/fs
tBLKL-50
80
80
MS0113-E-01
-8-
2005/01
AKM [ ASAHI KASEI MICROSYSTEMS ]
