[AK4753]
Function
X’tal Clock Output Pin
X’tal / External Clock Input Pin
27
External Master Clock Input Pin
28
Digital Power Supply Pin, 3.0V ~ 3.6V
29
Ground 2 Pin
Regulator Ripple Filter Pin
30 REG
O
This pin must be connected to VSS2 with 2.2μF capacitor in series.
Bypass Control Input Pin
31 BYPASS
I
“H”: DSP Bypass mode
“L”: Normal Operation
No Connect Pin
32 NC
-
No internal bonding. This pin must be connected to VSS2.
Note 1. All input pins except analog input pins (AINL, AINR, SAIN1, SAIN2) must not be left floating.
No.
26
Pin Name
XTO
XTI
MCKI
DVDD
VSS2
I/O
O
I
I
-
-
■
Handling of Unused Pin
The unused I/O pins must be processed appropriately as below.
Classification
Pin Name
AINL, AINR, SAIN1, SAIN2, FLT, LOUT1/LOUT+,
Analog
ROUT1/LOUT-, LOUT2/ROUT+/MOUT+,
ROUT2/ROUT-/MOUT-
XTO, SDA, EESDA, EESCL, MUTEN, STO
Digital
LRCK, BICK, SDTI, XTI/MCKI, EXTEE, TEST, SCL
Setting
Open
Open
These pins must be connected to VSS2.
MS1311-E-00
-5-
2011/07
AKM [ ASAHI KASEI MICROSYSTEMS ]
