[AK4706]
■ Grounding and Power Supply Decoupling
VD1-2, VP, VVD1-4, VSS1-2 and VVSS1-4 should be supplied from analog supply unit with low impedance and be
separated from system digital supply. An electrolytic capacitor 10μF parallel with a 0.1μF ceramic capacitor should be
attached to these pins to eliminate the effects of high frequency noise. The 0.1μF ceramic capacitors should be placed as
near to VD (VD1-2, VP, VVD1-4) as possible.
■ Voltage Reference
DVCOM and PVCOM are signal ground of this chip. An electrolytic capacitor 10μF parallel with a 0.1μF ceramic
capacitor should be attached to these VCOM pins to eliminate the effects of high frequency noise. No load current may be
drawn from these VCOM pins. All signals, especially clocks, should be kept away from these VCOM pins in order to
avoid unwanted coupling into the AK4706.
■ Analog Audio Outputs
The analog outputs are also single-ended and centered on 5.6V(typ.). The output signal range is typically 2Vrms
(typ@VD1=5V). The internal switched-capacitor filter and continuous-time filter attenuate the noise generated by the
delta-sigma modulator beyond the audio pass band. Therefore, any external filters are not required for typical application.
The output voltage is a positive full scale for 7FFFFFH (@24bit) and a negative full scale for 800000H (@24bit). The
ideal output is 5.6V(typ.) for 000000H (@24bit). The DC voltage on analog outputs are eliminated by AC coupling.
■ REFI pin
The REFI pin is video current reference pin. This pin should be connected to VVD1 through a 10kΩ±1% resistor
externally as shown in the Figure 20. No load current may be drawn from this pin. All signals, especially clocks, should be
kept away from this pin in order to avoid unwanted coupling.
AK4706
VVD1
R=10k ±1%
Ω
REFI
Figure 20. REFI pin
MS0507-E-01
2010/09
- 49 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
